edt_si5326.h Source File

00001 
00002 #ifndef EDT_SI5326_REGS_H
00003 #define EDT_SI5326_REGS_H
00004 
00005 #ifdef __cplusplus
00006 extern "C" {
00007 #endif
00008 
00009 #define EDT_SI5326_NREGS 48
00010 
00011 #include "lib_two_wire.h"
00012 
00013 typedef struct _si5326_regs {
00014     int spim;
00015     int bypass_reg;
00016     int fxdly;
00017     int ck_prior2;
00018     int ck_prior1;
00019     int bwsel_reg;
00020     int cksel_reg;
00021     int dhold;
00022     int sq_ical;
00023     int autosel_reg;
00024     int hist_del;
00025     int icmos;
00026     int sleep;
00027     int sfout2_reg;
00028     int sfout1_reg;
00029     int fosrefsel;
00030     int hlog_2;
00031     int hlog_1;
00032     int hist_avg;
00033     int dsbl2_reg;
00034     int dsbl1_reg;
00035     int pd_ck2;
00036     int pd_ck1;
00037     int clat;
00038     int flat_valid;
00039     int flat;
00040     int fos_en;
00041     int fos_thr;
00042     int valtime;
00043     int lockt;
00044     int ck2_bad_pin;
00045     int ck1_bad_pin;
00046     int lol_pin;
00047     int int_pin;
00048     int incdec_pin;
00049     int ck1_actv_pin;
00050     int cksel_pin;
00051     int ck_actv_pol;
00052     int ck_bad_pol;
00053     int lol_pol;
00054     int int_pol;
00055     int los2_msk;
00056     int los1_msk;
00057     int losx_msk;
00058     int fos2_msk;
00059     int fos1_msk;
00060     int lol_msk;
00061     int n1_hs;
00062     int nc1_ls;
00063     int nc2_ls;
00064     int n2_hs;
00065     int n2_ls;
00066     int n31;
00067     int n32;
00068     int clkin2rate;
00069     int clkin1rate;
00070     int ck2_actv_reg;
00071     int ck1_actv_reg;
00072     int los2_int;
00073     int los1_int;
00074     int losx_int;
00075     int clatprogress;
00076     int digholdvalid;
00077     int fos2_int;
00078     int fos1_int;
00079     int lol_int;
00080     int los2_flg;
00081     int los1_flg;
00082     int losx_flg;
00083     int fos2_flg;
00084     int fos1_flg;
00085     int lol_flg;
00086     int nvm_rev;
00087     int partnum_ro;
00088     int revid_ro;
00089     int rst_reg;
00090     int ical;
00091     int grade_ro;
00092     int independentskew1;
00093     int independentskew2;  
00094 } EdtSI5326regs;
00095 
00096 
00097 
00098 /* timing specific values */
00099 
00100 typedef struct si_info {
00101     int n1_hs;
00102     int n1_ls;
00103     int n2_ls;
00104     int n2_hs;
00105     int n3;
00106     int bwsel;
00107     double output; /* output frequency */
00108 
00109 } EdtSI53xx;
00110 
00111 
00112 /* description of all register values */
00113 
00114 
00115 extern EdtRegisterDescriptor si5326regs_map[];
00116 
00117 
00118 EDTAPI void 
00119 edt_vco_si5326_print(EdtSI53xx *sip);
00120 
00121 EDTAPI double edt_vco_si5326_compute(double xtal, double target, EdtSI53xx *sip);
00122 EDTAPI double edt_vco_si5326_compute2(double xtal, double target, double target2, EdtSI53xx *sip, EdtSI53xx *sip2,int direction);
00123 EDTAPI double edt_vco_si5326_compute3(double xtal, double target, double target2, EdtSI53xx *sip, EdtSI53xx *sip2,int direction);
00124 
00125 #ifdef __cplusplus
00126 }
00127 #endif
00128 
00129 #endif