HISTORY 1997 creation 1998-1999 various mods, including incrementally add 4010, 4013, etc. capability 2000 rewritten from standalone to library routine 8/2001 rewrote FPGA header code to be smarter, now actually decodes header and finds data size and start of data reliably and independent of the FPGA size. Also rewrote to look at and get sizes of and create a list of files found, then sort by size and try in order smallest to largest, since can SMOKE a 600 part trying to load a larger file in it.
(C) 1997-2007 Engineering Design Team, Inc.
Definition in file edt_bitload.c.
#include "edtinc.h"
#include "edt_bitload.h"
#include "pciload.h"
#include <stdlib.h>
#include <ctype.h>
Go to the source code of this file.
Defines | |
| #define | DEBUG1 EDTLIB_MSG_INFO_1 |
| #define | DEBUG2 EDTLIB_MSG_INFO_2 |
| #define | MAPBITARRAY(a, b, c) (b=NULL,c=0) |
| #define | MGK_SIZE 13 |
Functions | |
| void | bf_add_entry (EdtBitfileList *bf, EdtBitfileHeader *bfh) |
| int | bf_allocate_max_buffer (EdtBitfileList *bf, EdtBitfile *data) |
| void | bf_check_and_add (EdtBitfileList *bf, const char *fname) |
| void | bf_destroy (EdtBitfileList *bf) |
| void | bf_init (EdtBitfileList *bf) |
| void | bfh_init (EdtBitfileHeader *bfh) |
| EdtSizedBuffer functions - these are a hack to get C++ behavior in C. | |
| int | bitload_has_slashes (const char *name) |
| int | edt_access_bitfile (const char *path, int perm) |
| int | edt_bitfile_allocate (EdtBitfile *bfd, int size) |
| int | edt_bitfile_close_file (EdtBitfile *bfd) |
| void | edt_bitfile_destroy (EdtBitfile *bfd) |
| void | edt_bitfile_init (EdtBitfile *bfd) |
| int | edt_bitfile_load_array (EdtBitfile *bfd, u_char *data, int size) |
| int | edt_bitfile_load_file (EdtBitfile *bfd, const char *name) |
| int | edt_bitfile_open_file (EdtBitfile *bfd, const char *name, u_char writing) |
| int | edt_bitfile_read (EdtBitfile *bfd, void *target, int length) |
| int | edt_bitfile_read_header (const char *bitpath, EdtBitfileHeader *bfh, char *header) |
| int | edt_bitfile_seek (EdtBitfile *bfd, int offset) |
| int | edt_bitfile_size (EdtBitfile *bfd) |
| int | edt_bitfile_tell (EdtBitfile *bfd) |
| int | edt_bitload (EdtDev *edt_p, const char *indir, const char *name, int flags, int skip) |
| Searches for and loads a gate array bit file into an EDT PCI board. | |
| const char * | edt_bitload_basedir (EdtDev *edt_p, const char *in, char *out) |
| void | edt_bitload_devid_to_bitdir (int id, char *devdir) |
| int | edt_bitload_from_prom (EdtDev *edt_p, u_int addr1, int size1, u_int addr2, int size2, int flags) |
| Bitload from a given address in the PCI PROM. | |
| int | edt_bitload_select_fox_file (EdtDev *edt_p, char *rbtfile) |
| int | edt_get_bitfile_header (EdtBitfile *bp, EdtBitfileHeader *bfh) |
| int | edt_get_bitfile_list (const char *basedir, const char *devdir, const char *fname, EdtBoardFpgas *fpga_list, int id, int channel, EdtBitfileList *bf, char *fpga_hint) |
| Assumes bf has been initialized. | |
| int | edt_get_fpga_hint (EdtDev *edt_p, char *bd_xilinx) |
| int | edt_get_sorted_fpga_names (EdtBoardFpgas *fpga_list, int id, int channel, char *fpga_hint, char **sorted) |
| lookup an id in the list, then if fpga_hint is non-NULL, put it at the front of the list | |
| int | edt_get_x_array_header (u_char *ba, char *header, int *size) |
| int | edt_get_x_file_header (const char *bitname, char *header, int *size) |
| char ** | edt_lookup_fpgas (EdtBoardFpgas *fpgas, int id, int channel) |
| char ** | edt_lookup_mezz_names (EdtDev *edt_p, int channel) |
| char ** | edt_lookup_ui_names (EdtDev *edt_p) |
| int | edt_oc192_rev2_fname_hack (EdtDev *edt_p, const char *bitname, char *hacked) |
| Appends a '2' to the bitname if the OC192 Mezzanine board rev is > 1. | |
| int | edt_program_flash (EdtDev *edt_p, const u_char *buf, int size, int do_sleep) |
| Program the interface fpga flash PROM. | |
| void | ensure_bitfile_name (const char *name, char *bitname) |
Variables | |
| u_char | Altera2MagicArray [MGK_SIZE] = {0x00, 0x0e, 0x0d, 0x0f, 0x0a, 0x02, 0x0f, 0x0e, 0x08, 0x08, 0x0a, 0x00, 0x01 } |
| u_char | AlteraMagicArray [MGK_SIZE] = {0x00, 0x0e, 0x0d, 0x0f, 0x0a, 0x00, 0x0f, 0x0e, 0x08, 0x08, 0x0a, 0x00, 0x01 } |
| EdtBoardFpgas | board_chips [] |
| EdtBoardFpgas | mezz_chips [] |
| u_char | XilinxMagicArray [MGK_SIZE] = {0x00, 0x09, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x00, 0x00, 0x01 } |
| int edt_access_bitfile | ( | const char * | path, | |
| int | perm | |||
| ) |
Definition at line 1257 of file edt_bitload.c.
| int edt_oc192_rev2_fname_hack | ( | EdtDev * | edt_p, | |
| const char * | bitname, | |||
| char * | hacked | |||
| ) |
Appends a '2' to the bitname if the OC192 Mezzanine board rev is > 1.
| edt_p | The EDT board structure for the unit with the OC192 mezzanine attached. | |
| hacked_bitname | A string into which the new name will be put (should be at least 256 characters long). | |
| bitname | the generic bitfile name, with or without the absolute path. |
Definition at line 1162 of file edt_bitload.c.
| int edt_program_flash | ( | EdtDev * | edt_p, | |
| const u_char * | buf, | |||
| int | size, | |||
| int | do_sleep | |||
| ) |
Program the interface fpga flash PROM.
Typically only called by edt_bitload.
| edt_p | pointer to edt device structure returned by edt_open | |
| buf | buffer containing the data to be loaded | |
| size | number of bytes to load from buffer add sleeps to slow it down in case of host speed issues |
Definition at line 1696 of file edt_bitload.c.
1.4.7