libpdma.c

/* #pragma ident "@(#)libpdma.c 1.24 05/30/07 EDT" */

/*
 * See /opt/EDTpcd/README.pdma
 */

#include <sys/mman.h>
#include "edtinc.h"
#include "libpdma.h"


u_int
regswap(u_int val)
{
#ifdef __sparc
    /* byteswap */
    val = ((val & 0xFF00FF00) >> 8) | ((val & 0x00FF00FF) << 8);

    /* shortswap */
    val = ((val & 0xFFFF0000) >> 16) | ((val & 0x0000FFFF) << 16);
#endif

    return val;
}



int
pdma_init(EdtDev *edt_p, int bufsize, int numbufs, u_char **bufs)
{
    u_int mode;
    void * mapaddr;
    Pdma_t *p;

    if (bufsize > PDMA_MAX_SIZE)
    {
        fprintf(stderr, "pdma_init:  bufsize (%d) exceeds PDMA_MAX_SIZE (%d)\n",
                                                       bufsize, PDMA_MAX_SIZE);
        return -1;
    }

    if (numbufs != 1)
    {
        fprintf(stderr, "pdma_init:  number of buffers must be 1.\nContinuing with one buffer.\n");
        numbufs = 1;
    }

    if ((edt_p->Pdma_p = (Pdma_t *) edt_alloc(sizeof(Pdma_t))) == NULL)
    {
        return -1;
    }

    p = (Pdma_t *) edt_p->Pdma_p;
    memset(p, 0, sizeof(Pdma_t));


    /*
     * Map in the PCI registers and set a pointer to the DMA command register
     */

    if ((mapaddr = (void *) edt_mapmem(edt_p, 0, 256)) == NULL)
        return -1;

    p->dmacmd  = (u_int  *) ((u_char *)mapaddr + (EDT_SG_NXT_CNT    & 0xff));
    p->dmaaddr = (u_int  *) ((u_char *)mapaddr + (EDT_SG_NXT_ADDR   & 0xff));
    p->dmacfg  = (u_int  *) ((u_char *)mapaddr + (EDT_DMA_CFG       & 0xff));
    p->dmacnt  = (u_int  *) ((u_char *)mapaddr + (EDT_DMA_CUR_CNT   & 0xff));
    p->off_p   = (u_char *) ((u_char *)mapaddr + (EDT_REMOTE_OFFSET & 0xff));
    p->data_p  = (u_char *) ((u_char *)mapaddr + (EDT_REMOTE_DATA   & 0xff));


    /*
     * Enable Programmed DMA mode, form a single ring buffer, and
     * map in the buffer's scatter-gather list
     */

    mode = 1;
    edt_ioctl(edt_p, EDTS_PDMA_MODE, &mode);

    if (edt_configure_ring_buffers(edt_p, bufsize, numbufs, EDT_WRITE, bufs) != 0)
    {
        edt_free((u_char *)p);
        return -1;
    }

    p->pdma_size     = bufsize;
    p->pdma_databufs = edt_buffer_addresses(edt_p);


    /*
     * Map and copy the driver ring buffer SG list.
     */
    if ((mapaddr = (volatile caddr_t) mmap((caddr_t)0, PDMA_SIZE,
        PROT_READ|PROT_WRITE, MAP_SHARED, edt_p->fd, PDMA_OFFSET)) == NULL)
    {
        edt_free((u_char *)p);
        return -1;
    }
    p->dma_sglist = (u_int *) mapaddr;

    memcpy((u_char *)p->dma_sglist_copy, (u_char *)p->dma_sglist, PDMA_SIZE);

    /*
     * Obtain the physical address for the scatter-gather list.
     */
    {
        edt_buf sg_args;

        sg_args.desc = EDT_SGTODO_FIRST_SG;
        sg_args.value = 0;
        edt_ioctl(edt_p, EDTG_SGINFO, &sg_args);
        p->sg_paddr = (u_int) sg_args.value;
    }

    p->sv_dma_cfg = *p->dmacfg;
    p->dma_intr_en = 1;

    /*
     * At this step the driver does everything except program
     * the DMA registers in PDMA mode.  Later the user calls
     * pdma_start_dma() to program the registers each time a
     * zero-latency DMA is required.
     */
    edt_start_buffers(edt_p, 0);

    return 0;
}


int
pdma_close(EdtDev *edt_p)
{
    int mode = 0;
    Pdma_t *p = (Pdma_t *) edt_p->Pdma_p;
    extern int errno;

    if (p == NULL)
    {
        errno = EINVAL;
        return -1;
    }

    if (p && p->dma_sglist)
        munmap((caddr_t) p->dma_sglist, PDMA_SIZE);

    edt_disable_ring_buffers(edt_p);
    edt_ioctl(edt_p, EDTS_PDMA_MODE, &mode);
    edt_free((u_char *)edt_p->Pdma_p);
    edt_p->Pdma_p = NULL;

    return 0;
}


/*
 * Set the size of the next Pdma transfer in bytes.
 */
int
pdma_set_size(EdtDev *edt_p, int size)
{
    int i;
    Pdma_t *p = (Pdma_t *) edt_p->Pdma_p;
    extern int errno;

    if (p == NULL)
    {
        errno = EINVAL;
        return -1;
    }

    /*
     * Return error if larger than pdma_size or not divisible by 4.
     */
    if (size > p->pdma_size || size != (size & ~0x3))
    {
        errno = EINVAL;
        return -1;
    }

    /* Start with an unmodified copy of the SG list */
    memcpy((u_char *)p->dma_sglist, (u_char *)p->dma_sglist_copy, PDMA_SIZE);


    /* Go through the list and adjust the size */
    p->dma_count = 0;
    for (i = 1; size > 0; i += 2)
    {
        if (size > regswap(p->dma_sglist[i]))
        {
            size -= regswap(p->dma_sglist[i]);
            ++ p->dma_count;
        }
        else
        {
            p->dma_sglist[i] = regswap(size | EDT_LIST_PAGEINT);
            ++ p->dma_count;
            break;
        }
    }

    if ((p->dma_count << 3) > PDMA_PAGESIZE)
        p->dma_count = PDMA_PAGESIZE >> 3;

    return 0;
}


int
pdma_start_dma(EdtDev *edt_p)
{
    Pdma_t *p = (Pdma_t *) edt_p->Pdma_p;
    u_int dmacmd_reg;
    u_int dmacfg_reg, tmp;
    int rw = 1, burst = 1;
    extern int errno;

    if (p == NULL)
    {
        errno = EINVAL;
        return -1;
    }

    dmacmd_reg = EDT_DMA_START | ((rw)             ? EDT_DMA_MEM_RD : 0)
                               | ((burst)          ? EDT_BURST_EN   : 0)
                               | ((p->dma_intr_en) ? EDT_EN_MN_DONE : 0);

    dmacmd_reg |= (p->dma_count << 3);

    dmacfg_reg  = p->sv_dma_cfg
                | ((burst)          ? regswap(EDT_RFIFO_ENB)   : 0)
                | ((p->dma_intr_en) ? regswap(EDT_PCI_EN_INTR) : 0);

    *p->dmacfg  = regswap(dmacfg_reg);
    tmp = *p->dmacfg;

    *p->dmaaddr = regswap(p->sg_paddr);
    tmp = *p->dmaaddr;

    *p->dmacmd  = regswap(dmacmd_reg);
    tmp = *p->dmacmd;

    return 0;
}


int
pdma_flush_fifo(EdtDev * edt_p)
{
    unsigned char cmd;
    unsigned int dmy;
    Pdma_t *p = (Pdma_t *) edt_p->Pdma_p;
    extern int errno;

    if (p == NULL)
    {
        errno = EINVAL;
        return -1;
    }

/* The PCI fifo is not used during output */
#if 0
    /* Turn off the PCI fifo */
    dmacfg_copy = regswap(*dmacfg);
    dmacfg_copy &= (~EDT_RFIFO_ENB);
    *dmacfg = regswap(dmacfg_copy);
    dmacfg_copy = regswap(*dmacfg);
#endif


    /* reset the interface fifos */
    *p->off_p = PCD_CMD & 0xff;
    dmy = *p->off_p;
    cmd = *p->data_p;
    cmd &= ~PCD_ENABLE;
    *p->data_p = cmd;
    dmy = *p->data_p;
    cmd |= PCD_ENABLE;
    *p->data_p = cmd;
    dmy = *p->data_p;


/* The PCI fifo is not used during output */
#if 0
    /* Turn     on the PCI fifos, which flushes them */
    dmacfg_copy |= (EDT_RFIFO_ENB);
    *dmacfg = regswap(dmacfg_copy);
    dmacfg_copy = regswap(*dmacfg);
#endif

    return 0;
}

int
pdma_abort_dma(EdtDev * edt_p)
{
    Pdma_t *p = (Pdma_t *) edt_p->Pdma_p;
    u_int dmacmd_reg = regswap(*p->dmacmd);
    extern int errno;

    if (p == NULL)
    {
        errno = EINVAL;
        return -1;
    }

    dmacmd_reg |= EDT_DMA_ABORT;
   *p->dmacmd = regswap(dmacmd_reg);
    dmacmd_reg = regswap(*p->dmacmd);

    return 0;
}

int
pdma_write_databuf(EdtDev *edt_p, int bufnum, void *buf, int size)
{
    Pdma_t *p = (Pdma_t *) edt_p->Pdma_p;
    extern int errno;

    if (p == NULL)
    {
        errno = EINVAL;
        return -1;
    }

    printf("pdma_write_databuf pdma_size %d size %d\n", p->pdma_size, size);
    fflush(stdout);
    if (size > p->pdma_size)
    {
        errno = EINVAL;
        return -1;
    }

    memcpy(p->pdma_databufs[bufnum], buf, size);

    return size;
}


void
pdma_dmaint_enable(EdtDev * edt_p, int enable)
{
    Pdma_t *p = (Pdma_t *) edt_p->Pdma_p;

    p->dma_intr_en = enable;
}

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