libedt.h File Reference

Detailed Description

File containing most libedt declarations.

Definition in file libedt.h.

Go to the source code of this file.

Data Structures

struct _dma_data_block

struct _EdtBitfileDescriptor

struct _EdtMezzDescriptor

struct _optionstr_fields

struct _prom_addr

struct buf_args

struct Edt_bdinfo

struct edt_buf

struct edt_device

struct edt_directDMA_t

struct edt_dma_info

struct Edt_embinfo

struct edt_event_handler

struct edt_ioctl_struct

struct edt_ioctl_struct32

struct edt_merge_args

struct edt_pll

struct Edt_prominfo

struct edt_sized_buffer

struct EdtPromData

struct EdtPromParmBlock

struct EdtRingBuffer

struct p53b_test

struct ser_buf

Defines

#define AMD_4013E   1

#define AMD_4013XLA   2

#define AMD_4028XLA   3

#define AMD_EP2AGX45D   17

#define AMD_EP2SGX30D   12

#define AMD_EP2SGX30D_A   16

#define AMD_SECTOR_SIZE   0x10000

#define AMD_SECTOR_SIZE2   0x20000

#define AMD_XC2S100_8M   7

#define AMD_XC2S150   4

#define AMD_XC2S200_4M   5

#define AMD_XC2S200_8M   6

#define AMD_XC2S300E   8

#define AMD_XC5VLX30T   10

#define AMD_XC5VLX30T_A   14

#define AMD_XC5VLX50T   11

#define AMD_XC5VLX70T   13

#define AMD_XC6SLX45   15

#define DBG_ALL   0xffffff00

#define DBG_ALLOC   0x04000000

#define DBG_BOARD   0x02000000

#define DBG_CREATE_CLOSE   0x00001000

#define DBG_DMA   0x00400000

#define DBG_DMA_SETUP   0x00800000

#define DBG_DPC   0x00010000

#define DBG_EVENTS   0x00080000

#define DBG_HW   0x00100000

#define DBG_INIT   0x00000100

#define DBG_INTR_EN   0x40000000

#define DBG_IOCTLS   0x00002000

#define DBG_ISR   0x00020000

#define DBG_LOCKS   0x00040000

#define DBG_MASK(level, mask)   ((mask) | (level & 0xff))

#define DBG_MASK_LEVEL(x)   ((x) & 0xff)

#define DBG_MASK_VAL(x)   ((x) & 0xffffff00)

#define DBG_MEMMAP   0x08000000

#define DBG_PNP   0x00000200

#define DBG_POWER   0x00000400

#define DBG_READ   0x00008000

#define DBG_READWRITE   (DBG_READ | DBG_WRITE)

#define DBG_REG   0x00200000

#define DBG_SERIAL   0x01000000

#define DBG_TIME   0x10000000

#define DBG_TIMEOUT   0x20000000

#define DBG_WRITE   0x00004000

#define DDMA_BUFSIZE   4096

#define DDMA_FIFOSIZE   2048

#define E_SECTOR_SIZE   0x04000

#define EDT_2K_DRIVER   2

#define EDT_ACT_ALWAYS   2

#define EDT_ACT_ALWAYS_WRITEONLY   6

#define EDT_ACT_CYCLE   4

#define EDT_ACT_KBS   5

#define EDT_ACT_NEVER   0

#define EDT_ACT_ONCE   1

#define EDT_ACT_ONELEFT   3

#define EDT_BASE_EVENTS   1

#define EDT_BDTYPE_P11W   3

#define EDT_BDTYPE_P16D   4

#define EDT_BDTYPE_P53B   5

#define EDT_BDTYPE_PCD   1

#define EDT_BDTYPE_PDV   2

#define EDT_BDTYPE_UNKN   0

#define EDT_BIGBUF_SIZE   512

#define EDT_BUF_EVENT_NAME   "edt_buf"

#define EDT_CD_TYPE   3

#define EDT_COPY_KBUFS   1

#define EDT_DEBUG_LEVELS   10

#define EDT_DEVICE_TYPE   0x8000

#define EDT_DIRECT_DMA   1

#define EDT_DMA_ABORTED   3

#define EDT_DMA_ACTIVE   1

#define EDT_DMA_IDLE   0

#define EDT_DMA_TIMEOUT   2

#define EDT_EODMA_EVENT   (EDT_BASE_EVENTS + 0)

#define EDT_EODMA_EVENT_NAME   "edt_eodma"

#define EDT_EVENT_ACQUIRE   EDT_PDV_EVENT_ACQUIRE

#define EDT_EVENT_BUF   (EDT_BASE_EVENTS + 1)

#define EDT_EVENT_MODE_CONTINUOUS   1

#define EDT_EVENT_MODE_MASK   0xFF000000

#define EDT_EVENT_MODE_ONCE   0

#define EDT_EVENT_MODE_SERIALIZE   2

#define EDT_EVENT_MODE_SHFT   24

#define EDT_EVENT_P11W_ATTN   (EDT_BASE_EVENTS + 4)

#define EDT_EVENT_P11W_CNT   (EDT_BASE_EVENTS + 5)

#define EDT_EVENT_P16D_DINT   (EDT_BASE_EVENTS + 3)

#define EDT_EVENT_P53B_DONE   (EDT_BASE_EVENTS + 15)

#define EDT_EVENT_P53B_DONE_NAME   "edt_p53b_done"

#define EDT_EVENT_P53B_INTERVAL   (EDT_BASE_EVENTS + 13)

#define EDT_EVENT_P53B_INTERVAL_NAME   "edt_p53b_interval"

#define EDT_EVENT_P53B_MODECODE   (EDT_BASE_EVENTS + 14)

#define EDT_EVENT_P53B_MODECODE_NAME   "edt_p53b_modecode"

#define EDT_EVENT_P53B_SRQ   (EDT_BASE_EVENTS + 12)

#define EDT_EVENT_P53B_SRQ_NAME   "edt_p53b_srq"

#define EDT_EVENT_PCD_STAT1   (EDT_BASE_EVENTS + 7)

#define EDT_EVENT_PCD_STAT1_NAME   "edt_pcd_stat1"

#define EDT_EVENT_PCD_STAT2   (EDT_BASE_EVENTS + 8)

#define EDT_EVENT_PCD_STAT2_NAME   "edt_pcd_stat2"

#define EDT_EVENT_PCD_STAT3   (EDT_BASE_EVENTS + 9)

#define EDT_EVENT_PCD_STAT3_NAME   "edt_pcd_stat3"

#define EDT_EVENT_PCD_STAT4   (EDT_BASE_EVENTS + 10)

#define EDT_EVENT_PCD_STAT4_NAME   "edt_pcd_stat4"

#define EDT_EVENT_STAT   (EDT_BASE_EVENTS + 2)

#define EDT_EVENT_TEMP   (EDT_BASE_EVENTS + 18)

#define EDT_EVENT_TEMP_NAME   "edt_temp_intr"

#define EDT_GS_TYPE   2

#define edt_has_chanreg(edt_p)   (ID_HAS_CHANREG(edt_p->devid))

#define edt_has_combined_fpga(edt_p)   (ID_HAS_COMBINED_FPGA(edt_p->devid))

#define edt_has_irigb(edt_p)   (ID_HAS_IRIGB(edt_p->devid))

#define edt_is_1553(edt_p)   (ID_IS_1553(edt_p->devid))

#define edt_is_16bit_prom(edt_p)   (ID_HAS_16BIT_PROM(edt_p->devid))

#define edt_is_16channel(edt_p)   (ID_IS_16CHANNEL(edt_p->devid))

#define edt_is_1lane(edt_p)   (ID_IS_1LANE(edt_p->devid))

#define edt_is_1or4channel(edt_p)   (ID_IS_1OR4CHANNEL(edt_p->devid))

#define edt_is_2channel(edt_p)   (ID_IS_2CHANNEL(edt_p->devid))

#define edt_is_32channel(edt_p)   (ID_IS_32CHANNEL(edt_p->devid))

#define edt_is_3channel(edt_p)   (ID_IS_3CHANNEL(edt_p->devid))

#define edt_is_4channel(edt_p)   (ID_IS_4CHANNEL(edt_p->devid))

#define edt_is_4lane(edt_p)   (ID_IS_4LANE(edt_p->devid))

#define edt_is_8lane(edt_p)   (ID_IS_8LANE(edt_p->devid))

#define edt_is_dummy(edt_p)   (ID_IS_DUMMY(edt_p->devid))

#define edt_is_dv_multichannel(edt_p)   (edt_is_dvcl(edt_p) || edt_is_dvfox(edt_p) || edt_p->devid == PDVAERO_ID)

#define edt_is_dvcl(edt_p)   (ID_IS_DVCL(edt_p->devid))

#define edt_is_dvcl2(edt_p)   (ID_IS_DVCL2(edt_p->devid))

#define edt_is_dvcls(edt_p)   (ID_IS_DVCLS(edt_p->devid))

#define edt_is_dvfox(edt_p)   (ID_IS_DVFOX(edt_p->devid))

#define edt_is_fciusps(edt_p)   (ID_IS_FCIUSPS(edt_p->devid))

#define edt_is_micron_prom(edt_p)   (ID_IS_MICRON_PROM(edt_p->devid))

#define edt_is_multichan(edt_p)   (ID_IS_MULTICHAN(edt_p->devid))

#define edt_is_pcd(edt_p)   (ID_IS_PCD(edt_p->devid))

#define edt_is_pcie_dvfox(edt_p)   (ID_IS_PCIE_DVFOX(edt_p->devid))

#define edt_is_pdv(edt_p)   (ID_IS_PDV(edt_p->devid))

#define edt_is_simulator(edt_p)   (ID_IS_DVCL2(edt_p->devid))

#define edt_is_unknown(edt_p)   (ID_IS_UNKNOWN(edt_p->devid))

#define EDT_LX_TYPE   4

#define EDT_MAKE_IOCTL(t, c)   (uint_t)(c)

#define EDT_MAX_EVENT_TYPES   (EDT_EVENT_TEMP + 1)

#define EDT_MAX_KERNEL_EVENTS   20

#define EDT_MMAP_KBUFS   2

#define EDT_N_BDTYPES   6

#define EDT_NORMAL_DMA   0

#define EDT_NT_DRIVER   1

#define EDT_P11W_ATTN_EVENT_NAME   "edt_p11wattn"

#define EDT_P11W_CNT_EVENT_NAME   "edt_cnt"

#define EDT_P16D_DINT_EVENT_NAME   "edt_p16dint"

#define EDT_PATHBUF_SIZE   256

#define EDT_PDV_ACQUIRE_EVENT_NAME   "edt_acquire"

#define EDT_PDV_EVENT_ACQUIRE   (EDT_BASE_EVENTS + 6)

#define EDT_PDV_EVENT_FVAL   (EDT_BASE_EVENTS + 16)

#define EDT_PDV_EVENT_FVAL_NAME   "edt_pdv_fval"

#define EDT_PDV_EVENT_TRIGINT   (EDT_BASE_EVENTS + 17)

#define EDT_PDV_EVENT_TRIGINT_NAME   "edt_pdv_trigint"

#define EDT_PDV_STROBE_EVENT   (EDT_BASE_EVENTS + 11)

#define EDT_PDV_STROBE_EVENT_NAME   "edt_pdv_strobe"

#define EDT_PERSISTENT_KBUFS   4

#define EDT_READ   0

#define EDT_SERBUF_OVRHD   16

#define EDT_SERBUF_SIZE   2048

#define EDT_SERIAL_SAVERESP   2

#define EDT_SERIAL_WAITRESP   1

#define edt_set_eodma_sig(p, s)   edt_set_eodma_int(p, s)

#define EDT_SG_ALLOCSIZE   8

#define EDT_SG_LOADSIZE   7

#define EDT_SG_TOTALUSED   9

#define EDT_SGLIST_PHYSICAL   3

#define EDT_SGLIST_SIZE   1

#define EDT_SGLIST_VIRTUAL   2

#define EDT_SGTODO_FIRST_SG   6

#define EDT_SGTODO_SIZE   4

#define EDT_SGTODO_VIRTUAL   5

#define EDT_SS_TYPE   1

#define EDT_STAT_EVENT_NAME   "edt_stat"

#define edt_stores_macaddrs(edt_p)   (ID_STORES_MACADDRS(edt_p->devid))

#define EDT_STRBUF_SIZE   128

#define edt_swab32(x)

#define EDT_TIMEOUT_BIT_STROBE   0x1

#define EDT_TIMEOUT_NULL   0

#define EDT_TM_CLICKS   1

#define EDT_TM_COUNTER   2

#define EDT_TM_FREQ   3

#define EDT_TM_INTR   4

#define EDT_TM_SEC_NSEC   0

#define EDT_UNIX_DRIVER   0

#define EDT_USER_BUFS   0

#define EDT_WAIT_OK   0

#define EDT_WAIT_OK_TIMEOUT   2

#define EDT_WAIT_TIMEOUT   1

#define EDT_WAIT_USER_WAKEUP   3

#define EDT_WDM_DRIVER   3

#define EDT_WRITE   1

#define EDTAPI_VERSION   EDTVERSION_HEX

#define EDTG_BITPATH   EIOC(141, EIO_GET, sizeof(edt_bitpath))

#define EDTG_BUFBYTECOUNT   EIOC(102, EIO_GET, sizeof(uint_t) * 2)

#define EDTG_BUFDONE   EIOC(36, EIO_GET, sizeof(bufcnt_t))

#define EDTG_BUFSIZE   EIOC(216, EIO_GET|EIO_SET, sizeof(u_int))

#define EDTG_BUILDID   EIOC(143, EIO_GET, sizeof(edt_version_string))

#define EDTG_BURST_EN   EIOC(97, EIO_GET, sizeof(uint_t))

#define EDTG_BYTECOUNT   EIOC(44, EIO_GET, sizeof(uint_t))

#define EDTG_CHECKBF   EIOC(18, EIO_GET|EIO_SET, sizeof(buf_args))

#define EDTG_CLRCIFLAGS   EIOC(148, EIO_GET, sizeof(u_int))

#define EDTG_CONFIG   EIOC(64, EIO_GET|EIO_SET, sizeof(edt_buf))

#define EDTG_CONFIG_COPY   EIOC(63, EIO_GET|EIO_SET, sizeof(edt_buf))

#define EDTG_DEBUG   EIOC(11, EIO_GET, sizeof(uint_t))

#define EDTG_DEBUG_INFO   EIOC(207, EIO_SET|EIO_GET, sizeof(buf_args))

#define EDTG_DEBUG_MASK   EIOC(26, EIO_GET|EIO_SET, sizeof(u_int))

#define EDTG_DEPENDENT   EIOC(32, EIO_GET, EDT_DEPSIZE)

#define EDTG_DEVID   EIOC(33, EIO_GET, sizeof(uint_t))

#define EDTG_DIRECT_DMA_DONE   EIOC(218, EIO_GET, sizeof(uint64_t))

#define EDTG_DMA_INFO   EIOC(172, EIO_GET, sizeof(edt_dma_info))

#define EDTG_DMA_MODE   EIOC(215, EIO_GET, sizeof(u_int))

#define EDTG_DRIVER_TYPE   EIOC(120, EIO_GET, sizeof(u_int))

#define EDTG_FIRSTFLUSH   EIOC(98, EIO_GET, sizeof(u_int))

#define EDTG_FLASH   EIOC(17, EIO_GET|EIO_SET, sizeof(edt_buf))

#define EDTG_FVAL_DONE   EIOC(153, EIO_GET, sizeof(u_char))

#define EDTG_FVAL_LOW   EIOC(168, EIO_SET|EIO_GET, sizeof(u_int))

#define EDTG_GOODBITS   EIOC(95, EIO_GET, sizeof(uint_t))

#define EDTG_IND_2_REG   EIOC(213, EIO_GET|EIO_SET, sizeof(edt_buf))

#define EDTG_INDIRECT_REG_BASE   EIOC(196, EIO_GET, sizeof(u_int))

#define EDTG_INTFC   EIOC(13, EIO_GET|EIO_SET, sizeof(edt_buf))

#define EDTG_INTR_MASK   EIOC(211, EIO_GET, sizeof(u_int))

#define EDTG_LINES_XFERRED   EIOC(154, EIO_SET|EIO_GET, sizeof(u_int))

#define EDTG_LONG   EIOC(67, EIO_GET|EIO_SET, sizeof(edt_buf))

#define EDTG_MAX_BUFFERS   EIOC(114, EIO_GET, sizeof(u_int))

#define EDTG_MAXCHAN   EIOC(221, EIO_GET, sizeof(int))

#define EDTG_MEM2SIZE   EIOC(208, EIO_GET, sizeof(u_int))

#define EDTG_MEMSIZE   EIOC(146, EIO_GET, sizeof(u_int))

#define EDTG_MERGE_SG   EIOC(24, EIO_GET, sizeof(uint_t))

#define EDTG_MEZZ_BITPATH   EIOC(171, EIO_GET, sizeof(edt_bitpath))

#define EDTG_MEZZ_ID   EIOC(185, EIO_SET|EIO_GET, sizeof(edt_buf))

#define EDTG_MULTI_DONE   EIOC(166, EIO_GET, sizeof(u_int))

#define EDTG_NUMBUFS   EIOC(186, EIO_GET, sizeof(int))

#define EDTG_OVERFLOW   EIOC(60, EIO_GET, sizeof(u_int))

#define EDTG_PADDR   EIOC(74, EIO_GET, sizeof(uint_t))

#define EDTG_PROG   EIOC(20, EIO_GET, sizeof(uint_t))

#define EDTG_PROG_READBACK   EIOC(22, EIO_GET, sizeof(uint_t))

#define EDTG_RCI_CHAN   EIOC(130, EIO_SET|EIO_GET, sizeof(edt_buf))

#define EDTG_REFTIME   EIOC(91, EIO_GET, sizeof(uint_t) * 2)

#define EDTG_REG   EIOC(15, EIO_GET|EIO_SET, sizeof(edt_buf))

#define EDTG_RESERVED_PAGES   EIOC(176, EIO_GET, sizeof(u_int))

#define EDTG_RTIMEOUT   EIOC(55, EIO_GET, sizeof(uint_t))

#define EDTG_SERIAL   EIOC(30, EIO_GET, sizeof(uint_t))

#define EDTG_SERIAL_FIFO   EIOC(52, EIO_GET, sizeof(int))

#define EDTG_SERIAL_WRITE_AVAIL   EIOC(158, EIO_GET, sizeof(u_int))

#define EDTG_SGINFO   EIOC(72, EIO_SET|EIO_GET, sizeof(edt_buf))

#define EDTG_SGLIST   EIOC(70, EIO_SET|EIO_GET, sizeof(buf_args))

#define EDTG_SGTODO   EIOC(69, EIO_GET, (EDT_TRACESIZE * 4))

#define EDTG_SYNC_INTERVAL   EIOC(201, EIO_GET, sizeof(u_int))

#define EDTG_TIMECOUNT   EIOC(73, EIO_GET, sizeof(uint_t))

#define EDTG_TIMEOUT_GOODBITS   EIOC(89, EIO_GET, sizeof(uint_t))

#define EDTG_TIMEOUT_OK   EIOC(164, EIO_GET, sizeof(u_int))

#define EDTG_TIMEOUTS   EIOC(47, EIO_GET, sizeof(int))

#define EDTG_TMSTAMP   EIOC(87, EIO_SET|EIO_GET, sizeof(uint_t) * 3)

#define EDTG_TODO   EIOC(109, EIO_GET, sizeof(u_int))

#define EDTG_TRACE_ENTRIES   EIOC(204, EIO_GET, sizeof(u_int))

#define EDTG_TRACE_SIZE   EIOC(202, EIO_GET, sizeof(u_int))

#define EDTG_TRACEBUF   EIOC(48, EIO_GET, (EDT_TRACESIZE * sizeof(int)))

#define EDTG_TRACEBUF2   EIOC(205, EIO_GET, sizeof(buf_args))

#define EDTG_UMEM_LOCK   EIOC(128, EIO_GET, sizeof(u_int))

#define EDTG_UNUSED1   EIOC(54, EIO_GET, sizeof(int))

#define EDTG_USER_DMA_WAKEUP   EIOC(160, EIO_GET, sizeof(u_int))

#define EDTG_VERSION   EIOC(142, EIO_GET, sizeof(edt_version_string))

#define EDTG_WAIT_STATUS   EIOC(161, EIO_GET, sizeof(u_int))

#define EDTG_WTIMEOUT   EIOC(56, EIO_GET, sizeof(uint_t))

#define EDTIO_V0   0

#define EDTMACOUI   0x00251C

#define EDTMACS_FNAME   "edtmactable.txt"

#define EDTPARTSFNAME   "edt_parts.xpn"

#define EdtPromParmData(p)   ((u_char *) p + sizeof(EdtPromParmBlock))

#define EDTS_ABORT_BP   EIOC(99, EIO_SET, sizeof(uint_t))

#define EDTS_ABORT_DELAY   EIOC(46, EIO_SET, sizeof(int))

#define EDTS_ABORTDMA_ONINTR   EIOC(151, EIO_SET, sizeof(u_int))

#define EDTS_ABORTINTR   EIOC(123, EIO_SET, sizeof(u_int))

#define EDTS_ADD_EVENT_FUNC   EIOC(82, EIO_SET, sizeof(uint_t))

#define EDTS_ALLOC_KBUFFER   EIOC(27, EIO_GET|EIO_SET, sizeof(buf_args))

#define EDTS_AUTODIR   EIOC(61, EIO_SET, sizeof(u_int))

#define EDTS_BAUDBITS   EIOC(90, EIO_SET, sizeof(uint_t))

#define EDTS_BITLOAD   EIOC(197, EIO_SET|EIO_GET, sizeof(buf_args))

#define EDTS_BITPATH   EIOC(140, EIO_SET, sizeof(edt_bitpath))

#define EDTS_BUF   EIOC(38, EIO_SET, sizeof(buf_args))

#define EDTS_BUF_MMAP   EIOC(169, EIO_SET|EIO_GET, sizeof(buf_args))

#define EDTS_BURST_EN   EIOC(96, EIO_SET, sizeof(uint_t))

#define EDTS_CLEAR_DMAID   EIOC(156, EIO_SET, sizeof(u_int))

#define EDTS_CLEAR_WAIT_EVENT   EIOC(86, EIO_SET, sizeof(uint_t))

#define EDTS_CLR_EVENT   EIOC(81, EIO_SET, sizeof(uint_t))

#define EDTS_CLRCIFLAGS   EIOC(149, EIO_SET, sizeof(u_int))

#define EDTS_CONFIG   EIOC(65, EIO_SET, sizeof(edt_buf))

#define EDTS_CUSTOMER   EIOC(124, EIO_SET, sizeof(u_int))

#define EDTS_DEBUG   EIOC(10, EIO_SET, sizeof(uint_t))

#define EDTS_DEBUG_MASK   EIOC(25, EIO_SET, sizeof(u_int))

#define EDTS_DEL_EVENT_FUNC   EIOC(83, EIO_SET, sizeof(uint_t))

#define EDTS_DEPENDENT   EIOC(31, EIO_SET, EDT_DEPSIZE)

#define EDTS_DIRECT_DMA_DONE   EIOC(217, EIO_SET, sizeof(uint64_t))

#define EDTS_DIRECTION   EIOC(147, EIO_SET, sizeof(u_int))

#define EDTS_DMA_MODE   EIOC(214, EIO_SET, sizeof(u_int))

#define EDTS_DMASYNC_FORCPU   EIOC(101, EIO_SET, sizeof(uint_t) * 3)

#define EDTS_DMASYNC_FORDEV   EIOC(100, EIO_SET, sizeof(uint_t) * 3)

#define EDTS_DOTIMEOUT   EIOC(103, EIO_SET, sizeof(uint_t))

#define EDTS_DRIVER_TYPE   EIOC(121, EIO_SET, sizeof(u_int))

#define EDTS_DRV_BUFFER   EIOC(122, EIO_SET | EIO_GET, sizeof(u_int))

#define EDTS_DRV_BUFFER_LEAD   EIOC(157, EIO_SET | EIO_GET, sizeof(u_int))

#define EDTS_DUMP_SGLIST   EIOC(108, EIO_SET, sizeof(uint_t))

#define EDTS_ENDACT   EIOC(78, EIO_SET, sizeof(uint_t))

#define EDTS_ENDDMA   EIOC(50, EIO_SET, sizeof(edt_buf))

#define EDTS_EODMA_SIG   EIOC(57, EIO_SET, sizeof(uint_t))

#define EDTS_ETEC_ERASEBUF   EIOC(119, EIO_SET, sizeof(u_int))

#define EDTS_ETEC_ERASEBUF_INIT   EIOC(118, EIO_SET, sizeof(uint_t) * 2)

#define EDTS_ETEC_SET_IDLE   EIOC(125, EIO_SET, sizeof(u_int) * 3)

#define EDTS_EVENT_HNDL   EIOC(112, EIO_SET, sizeof(edt_buf))

#define EDTS_EVENT_SIG   EIOC(59, EIO_SET, sizeof(edt_buf))

#define EDTS_FIRSTFLUSH   EIOC(62, EIO_SET, sizeof(u_int))

#define EDTS_FLASH   EIOC(16, EIO_SET, sizeof(edt_buf))

#define EDTS_FREEBUF   EIOC(41, EIO_SET, sizeof(uint_t))

#define EDTS_FVAL_DONE   EIOC(152, EIO_SET, sizeof(u_char))

#define EDTS_IGNORE_SIGNALS   EIOC(178, EIO_SET, sizeof(u_int))

#define EDTS_INCTIMEOUT   EIOC(220, EIO_SET, sizeof(uint_t))

#define EDTS_IND_2_REG   EIOC(212, EIO_SET | EIO_GET, sizeof(edt_buf))

#define EDTS_INDIRECT_REG_BASE   EIOC(195, EIO_SET, sizeof(u_int))

#define EDTS_INTFC   EIOC(12, EIO_SET, sizeof(edt_buf))

#define EDTS_INTR_MASK   EIOC(210, EIO_SET, sizeof(u_int))

#define EDTS_KERNEL_ALLOC   EIOC(175, EIO_SET | EIO_GET, sizeof(u_int))

#define EDTS_LONG   EIOC(68, EIO_SET, sizeof(edt_buf))

#define EDTS_MAPMEM   EIOC(117, EIO_GET | EIO_SET, sizeof(edt_buf))

#define EDTS_MAX_BUFFERS   EIOC(113, EIO_SET, sizeof(u_int))

#define EDTS_MERGE_SG   EIOC(23, EIO_SET, sizeof(uint_t))

#define EDTS_MERGEPARMS   EIOC(150, EIO_SET, sizeof(edt_merge_args))

#define EDTS_MEZZ_BITPATH   EIOC(170, EIO_SET, sizeof(edt_bitpath))

#define EDTS_MEZZ_ID   EIOC(184, EIO_SET, sizeof(edt_buf))

#define EDTS_MEZZLOAD   EIOC(198, EIO_SET|EIO_GET, sizeof(buf_args))

#define EDTS_MULTI_DONE   EIOC(165, EIO_GET, sizeof(u_int))

#define EDTS_NUMBUFS   EIOC(37, EIO_SET, sizeof(int))

#define EDTS_PCILOAD   EIOC(199, EIO_SET, sizeof(buf_args))

#define EDTS_PDMA_MODE   EIOC(145, EIO_SET, sizeof(u_int))

#define EDTS_PDVCONT   EIOC(105, EIO_SET, sizeof(uint_t))

#define EDTS_PDVDPATH   EIOC(106, EIO_SET, sizeof(uint_t))

#define EDTS_PROCESS_ISR   EIOC(155, EIO_SET|EIO_GET, sizeof(u_int))

#define EDTS_PROG   EIOC(19, EIO_SET, sizeof(uint_t))

#define EDTS_PROG_READBACK   EIOC(21, EIO_SET, sizeof(uint_t))

#define EDTS_PROG_XILINX   EIOC(116, EIO_SET, sizeof(edt_sized_buffer))

#define EDTS_RAW_SGLIST   EIOC(177, EIO_SET, sizeof(buf_args))

#define EDTS_RCI_CHAN   EIOC(129, EIO_SET, sizeof(edt_buf))

#define EDTS_READ_END_DELAYS   EIOC(192, EIO_SET, sizeof(u_int))

#define EDTS_READ_ENDACT   EIOC(188, EIO_SET, sizeof(edt_buf))

#define EDTS_READ_START_DELAYS   EIOC(191, EIO_SET, sizeof(u_int))

#define EDTS_READ_STARTACT   EIOC(187, EIO_SET, sizeof(edt_buf))

#define EDTS_REFTIME   EIOC(92, EIO_SET, sizeof(uint_t) * 2)

#define EDTS_REFTMSTAMP   EIOC(104, EIO_SET, sizeof(uint_t))

#define EDTS_REG   EIOC(14, EIO_SET, sizeof(edt_buf))

#define EDTS_REG_AND   EIOC(94, EIO_SET|EIO_GET, sizeof(edt_buf))

#define EDTS_REG_BIT_CLEARSET   EIOC(181, EIO_SET, sizeof(edt_buf))

#define EDTS_REG_BIT_SETCLEAR   EIOC(182, EIO_SET, sizeof(edt_buf))

#define EDTS_REG_OR   EIOC(93, EIO_SET|EIO_GET, sizeof(edt_buf))

#define EDTS_REG_READBACK   EIOC(183, EIO_SET, sizeof(u_int))

#define EDTS_RESET_EVENT_COUNTER   EIOC(107, EIO_SET, sizeof(uint_t))

#define EDTS_RESETCOUNT   EIOC(79, EIO_SET, sizeof(uint_t))

#define EDTS_RESETSERIAL   EIOC(80, EIO_SET, sizeof(uint_t))

#define EDTS_RESUME   EIOC(110, EIO_SET, sizeof(u_int))

#define EDTS_RTIMEOUT   EIOC(34, EIO_SET, sizeof(uint_t))

#define EDTS_SERIAL   EIOC(29, EIO_SET, sizeof(uint_t))

#define EDTS_SERIAL_FIFO   EIOC(51, EIO_SET, sizeof(int))

#define EDTS_SERIALWAIT   EIOC(58, EIO_SET|EIO_GET, sizeof(edt_buf))

#define EDTS_SETBUF   EIOC(45, EIO_SET, sizeof(int))

#define EDTS_SGLIST   EIOC(71, EIO_SET, sizeof(buf_args))

#define EDTS_SOLARIS_DMA_MODE   EIOC(126, EIO_SET, sizeof(u_int))

#define EDTS_STARTACT   EIOC(77, EIO_SET, sizeof(uint_t))

#define EDTS_STARTBUF   EIOC(39, EIO_SET, sizeof(uint_t))

#define EDTS_STARTDMA   EIOC(49, EIO_SET, sizeof(edt_buf))

#define EDTS_STOPBUF   EIOC(42, EIO_SET, sizeof(uint_t))

#define EDTS_SYNC   EIOC(75, EIO_SET, sizeof(uint_t))

#define EDTS_SYNC_INTERVAL   EIOC(200, EIO_SET, sizeof(u_int))

#define EDTS_TEST_LOCK_ON   EIOC(167, EIO_SET, sizeof(u_int))

#define EDTS_TEST_STATUS   EIOC(174, EIO_SET | EIO_GET, sizeof(u_int))

#define EDTS_TIMEOUT_ACTION   EIOC(88, EIO_SET, sizeof(uint_t))

#define EDTS_TIMEOUT_OK   EIOC(163, EIO_SET, sizeof(u_int))

#define EDTS_TIMESTAMP_LEVEL   EIOC(180, EIO_SET, sizeof(u_int))

#define EDTS_TIMETYPE   EIOC(111, EIO_SET, sizeof(u_int))

#define EDTS_TRACE_CLEAR   EIOC(206, EIO_SET, sizeof(u_int))

#define EDTS_TRACE_REG   EIOC(179, EIO_SET, sizeof(u_int))

#define EDTS_TRACE_SIZE   EIOC(203, EIO_SET, sizeof(u_int))

#define EDTS_UMEM_LOCK   EIOC(127, EIO_SET, sizeof(u_int))

#define EDTS_UNUSED0   EIOC(53, EIO_SET, sizeof(int))

#define EDTS_USER_DMA_WAKEUP   EIOC(159, EIO_SET, sizeof(u_int))

#define EDTS_USER_FUNC   EIOC(173, EIO_SET | EIO_GET, sizeof(edt_sized_buffer))

#define EDTS_WAIT_DIRECT_DMA_DONE   EIOC(219, EIO_SET, sizeof(uint64_t))

#define EDTS_WAIT_EVENT   EIOC(85, EIO_SET, sizeof(uint_t))

#define EDTS_WAIT_EVENT_ONCE   EIOC(84, EIO_SET, sizeof(uint_t))

#define EDTS_WAIT_STATUS   EIOC(162, EIO_GET, sizeof(u_int))

#define EDTS_WAITBUF   EIOC(40, EIO_SET|EIO_GET, sizeof(uint_t))

#define EDTS_WAITCHAR   EIOC(144, EIO_SET, sizeof(edt_buf))

#define EDTS_WAITN   EIOC(76, EIO_SET, sizeof(uint_t))

#define EDTS_WRITE_END_DELAYS   EIOC(194, EIO_SET, sizeof(u_int))

#define EDTS_WRITE_ENDACT   EIOC(190, EIO_SET, sizeof(edt_buf))

#define EDTS_WRITE_PIO   EIOC(115, EIO_SET, sizeof(edt_sized_buffer))

#define EDTS_WRITE_START_DELAYS   EIOC(193, EIO_SET, sizeof(u_int))

#define EDTS_WRITE_STARTACT   EIOC(189, EIO_SET, sizeof(edt_buf))

#define EDTS_WTIMEOUT   EIOC(35, EIO_SET, sizeof(uint_t))

#define EG_BITPATH   EMAPI(EDTG_BITPATH)

#define EG_BUFBYTECOUNT   EMAPI(EDTG_BUFBYTECOUNT)

#define EG_BUFDONE   EMAPI(EDTG_BUFDONE)

#define EG_BUFSIZE   EMAPI(EDTG_BUFSIZE)

#define EG_BUILDID   EMAPI(EDTG_BUILDID)

#define EG_BURST_EN   EMAPI(EDTG_BURST_EN)

#define EG_BYTECOUNT   EMAPI(EDTG_BYTECOUNT)

#define EG_CHECKBF   EMAPI(EDTG_CHECKBF)

#define EG_CLRCIFLAGS   EMAPI(EDTG_CLRCIFLAGS)

#define EG_CONFIG   EMAPI(EDTG_CONFIG)

#define EG_CONFIG_COPY   EMAPI(EDTG_CONFIG_COPY)

#define EG_DEBUG   EMAPI(EDTG_DEBUG)

#define EG_DEBUG_INFO   EMAPI(EG_DEBUG_INFO)

#define EG_DEBUG_MASK   EMAPI(EDTG_DEBUG_MASK)

#define EG_DEBUG_SIZE   EMAPI(EDTG_DEBUG_SIZE)

#define EG_DEPENDENT   EMAPI(EDTG_DEPENDENT)

#define EG_DEVID   EMAPI(EDTG_DEVID)

#define EG_DIRECT_DMA_DONE   EMAPI(EDTG_DIRECT_DMA_DONE)

#define EG_DMA_INFO   EMAPI(EDTG_DMA_INFO)

#define EG_DMA_MODE   EMAPI(EDTG_DMA_MODE)

#define EG_DRIVER_TYPE   EMAPI(EDTG_DRIVER_TYPE)

#define EG_FIRSTFLUSH   EMAPI(EDTG_FIRSTFLUSH)

#define EG_FLASH   EMAPI(EDTG_FLASH)

#define EG_FVAL_DONE   EMAPI(EDTG_FVAL_DONE)

#define EG_FVAL_LOW   EMAPI(EDTG_FVAL_LOW)

#define EG_GOODBITS   EMAPI(EDTG_GOODBITS)

#define EG_IND_2_REG   EMAPI(EDTG_IND_2_REG)

#define EG_INDIRECT_REG_BASE   EMAPI(EDTG_INDIRECT_REG_BASE)

#define EG_INTFC   EMAPI(EDTG_INTFC)

#define EG_INTR_MASK   EMAPI(EDTG_INTR_MASK)

#define EG_LINES_XFERRED   EMAPI(EDTG_LINES_XFERRED)

#define EG_LONG   EMAPI(EDTG_LONG)

#define EG_MAX_BUFFERS   EMAPI(EDTG_MAX_BUFFERS)

#define EG_MAXCHAN   EMAPI(EDTG_MAXCHAN)

#define EG_MEM2SIZE   EMAPI(EDTG_MEM2SIZE)

#define EG_MEMSIZE   EMAPI(EDTG_MEMSIZE)

#define EG_MERGE_SG   EMAPI(EDTG_MERGE_SG)

#define EG_MEZZ_BITPATH   EMAPI(EDTG_MEZZ_BITPATH)

#define EG_MEZZ_ID   EMAPI(EDTG_MEZZ_ID)

#define EG_MULTI_DONE   EMAPI(EDTG_MULTI_DONE)

#define EG_NUMBUFS   EMAPI(EDTG_NUMBUFS)

#define EG_OVERFLOW   EMAPI(EDTG_OVERFLOW)

#define EG_PADDR   EMAPI(EDTG_PADDR)

#define EG_PROG   EMAPI(EDTG_PROG)

#define EG_PROG_READBACK   EMAPI(EDTG_PROG_READBACK)

#define EG_RCI_CHAN   EMAPI(EDTG_RCI_CHAN)

#define EG_REFTIME   EMAPI(EDTG_REFTIME)

#define EG_REG   EMAPI(EDTG_REG)

#define EG_RESERVED_PAGES   EMAPI(EDTG_RESERVED_PAGES)

#define EG_RTIMEOUT   EMAPI(EDTG_RTIMEOUT)

#define EG_SERIAL   EMAPI(EDTG_SERIAL)

#define EG_SERIAL_FIFO   EMAPI(EDTG_SERIAL_FIFO)

#define EG_SERIAL_WRITE_AVAIL   EMAPI(EDTG_SERIAL_WRITE_AVAIL)

#define EG_SGINFO   EMAPI(EDTG_SGINFO)

#define EG_SGLIST   EMAPI(EDTG_SGLIST)

#define EG_SGTODO   EMAPI(EDTG_SGTODO)

#define EG_SYNC_INTERVAL   EMAPI(EDTG_SYNC_INTERVAL)

#define EG_TIMECOUNT   EMAPI(EDTG_TIMECOUNT)

#define EG_TIMEOUT_GOODBITS   EMAPI(EDTG_TIMEOUT_GOODBITS)

#define EG_TIMEOUT_OK   EMAPI(EDTG_TIMEOUT_OK)

#define EG_TIMEOUTS   EMAPI(EDTG_TIMEOUTS)

#define EG_TMSTAMP   EMAPI(EDTG_TMSTAMP)

#define EG_TODO   EMAPI(EDTG_TODO)

#define EG_TRACE_ENTRIES   EMAPI(EDTG_TRACE_ENTRIES)

#define EG_TRACE_SIZE   EMAPI(EDTG_TRACE_SIZE)

#define EG_TRACEBUF   EMAPI(EDTG_TRACEBUF)

#define EG_TRACEBUF2   EMAPI(EDTG_TRACEBUF2)

#define EG_TYPE   EMAPI(EDTG_TYPE)

#define EG_UMEM_LOCK   EMAPI(EDTG_UMEM_LOCK)

#define EG_UNUSED1   EMAPI(EDTG_UNUSED1)

#define EG_USER_DMA_WAKEUP   EMAPI(EDTG_USER_DMA_WAKEUP)

#define EG_VERSION   EMAPI(EDTG_VERSION)

#define EG_WAIT_STATUS   EMAPI(EDTG_WAIT_STATUS)

#define EG_WTIMEOUT   EMAPI(EDTG_WTIMEOUT)

#define EIO_ACTION_MASK   0x000003ff

#define EIO_DECODE_ACTION(code)   (code & EIO_ACTION_MASK)

#define EIO_DECODE_GET(code)   ((code & EIO_GET_MASK) != 0)

#define EIO_DECODE_SET(code)   ((code & EIO_SET_MASK) != 0)

#define EIO_DECODE_SIZE(code)   ((code & EIO_SIZE_MASK) >> EIO_SIZE_SHIFT)

#define EIO_GET   0x01000000

#define EIO_GET_MASK   EIO_GET

#define EIO_SET   0x02000000

#define EIO_SET_MASK   EIO_SET

#define EIO_SIZE_MASK   0x00fffc00

#define EIO_SIZE_SHIFT   10

#define EIO_TYPE_SHIFT   24

#define EIOC(action, type, size)

#define EIODA(code)   EIO_DECODE_ACTION(code)

#define EMAPI(x)   EDT_MAKE_IOCTL(EDT_DEVICE_TYPE,EIODA(x))

#define ES_ABORT_BP   EMAPI(EDTS_ABORT_BP)

#define ES_ABORT_DELAY   EMAPI(EDTS_ABORT_DELAY)

#define ES_ABORTDMA_ONINTR   EMAPI(EDTS_ABORTDMA_ONINTR)

#define ES_ABORTINTR   EMAPI(EDTS_ABORTINTR)

#define ES_ADD_EVENT_FUNC   EMAPI(EDTS_ADD_EVENT_FUNC)

#define ES_ALLOC_KBUFFER   EMAPI(EDTS_ALLOC_KBUFFER)

#define ES_AUTODIR   EMAPI(EDTS_AUTODIR)

#define ES_BAUDBITS   EMAPI(EDTS_BAUDBITS)

#define ES_BITLOAD   EMAPI(EDTS_BITLOAD)

#define ES_BITPATH   EMAPI(EDTS_BITPATH)

#define ES_BUF   EMAPI(EDTS_BUF)

#define ES_BUF_MMAP   EMAPI(EDTS_BUF_MMAP)

#define ES_BURST_EN   EMAPI(EDTS_BURST_EN)

#define ES_CLEAR_DMAID   EMAPI(EDTS_CLEAR_DMAID)

#define ES_CLEAR_WAIT_EVENT   EMAPI(EDTS_CLEAR_WAIT_EVENT)

#define ES_CLR_EVENT   EMAPI(EDTS_CLR_EVENT)

#define ES_CLRCIFLAGS   EMAPI(EDTS_CLRCIFLAGS)

#define ES_CONFIG   EMAPI(EDTS_CONFIG)

#define ES_CUSTOMER   EMAPI(EDTS_CUSTOMER)

#define ES_DEBUG   EMAPI(EDTS_DEBUG)

#define ES_DEBUG_MASK   EMAPI(EDTS_DEBUG_MASK)

#define ES_DEL_EVENT_FUNC   EMAPI(EDTS_DEL_EVENT_FUNC)

#define ES_DEPENDENT   EMAPI(EDTS_DEPENDENT)

#define ES_DIRECT_DMA_DONE   EMAPI(EDTS_DIRECT_DMA_DONE)

#define ES_DIRECTION   EMAPI(EDTS_DIRECTION)

#define ES_DMA_MODE   EMAPI(EDTS_DMA_MODE)

#define ES_DMASYNC_FORCPU   EMAPI(EDTS_DMASYNC_FORCPU)

#define ES_DMASYNC_FORDEV   EMAPI(EDTS_DMASYNC_FORDEV)

#define ES_DOTIMEOUT   EMAPI(EDTS_DOTIMEOUT)

#define ES_DRIVER_TYPE   EMAPI(EDTS_DRIVER_TYPE)

#define ES_DRV_BUFFER   EMAPI(EDTS_DRV_BUFFER)

#define ES_DRV_BUFFER_LEAD   EMAPI(EDTS_DRV_BUFFER_LEAD)

#define ES_DUMP_SGLIST   EMAPI(EDTS_DUMP_SGLIST)

#define ES_ENDACT   EMAPI(EDTS_ENDACT)

#define ES_ENDDMA   EMAPI(EDTS_ENDDMA)

#define ES_EODMA_SIG   EMAPI(EDTS_EODMA_SIG)

#define ES_ETEC_ERASEBUF   EMAPI(EDTS_ETEC_ERASEBUF)

#define ES_ETEC_ERASEBUF_INIT   EMAPI(EDTS_ETEC_ERASEBUF_INIT)

#define ES_ETEC_SET_IDLE   EMAPI(EDTS_ETEC_SET_IDLE)

#define ES_EVENT_HNDL   EMAPI(EDTS_EVENT_HNDL)

#define ES_EVENT_SIG   EMAPI(EDTS_EVENT_SIG)

#define ES_FIRSTFLUSH   EMAPI(EDTS_FIRSTFLUSH)

#define ES_FLASH   EMAPI(EDTS_FLASH)

#define ES_FREEBUF   EMAPI(EDTS_FREEBUF)

#define ES_FVAL_DONE   EMAPI(EDTS_FVAL_DONE)

#define ES_IGNORE_SIGNALS   EMAPI(EDTS_IGNORE_SIGNALS)

#define ES_INCTIMEOUT   EMAPI(EDTS_INCTIMEOUT)

#define ES_IND_2_REG   EMAPI(EDTS_IND_2_REG)

#define ES_INDIRECT_REG_BASE   EMAPI(EDTS_INDIRECT_REG_BASE)

#define ES_INTFC   EMAPI(EDTS_INTFC)

#define ES_INTR_MASK   EMAPI(EDTS_INTR_MASK)

#define ES_KERNEL_ALLOC   EMAPI(EDTS_KERNEL_ALLOC)

#define ES_LONG   EMAPI(EDTS_LONG)

#define ES_MAPMEM   EMAPI(EDTS_MAPMEM)

#define ES_MAX_BUFFERS   EMAPI(EDTS_MAX_BUFFERS)

#define ES_MERGE_SG   EMAPI(EDTS_MERGE_SG)

#define ES_MERGEPARMS   EMAPI(EDTS_MERGEPARMS)

#define ES_MEZZ_BITPATH   EMAPI(EDTS_MEZZ_BITPATH)

#define ES_MEZZ_ID   EMAPI(EDTS_MEZZ_ID)

#define ES_MEZZLOAD   EMAPI(EDTS_MEZZLOAD)

#define ES_MULTI_DONE   EMAPI(EDTS_MULTI_DONE)

#define ES_NUMBUFS   EMAPI(EDTS_NUMBUFS)

#define ES_PCILOAD   EMAPI(EDTS_PCILOAD)

#define ES_PDMA_MODE   EMAPI(EDTS_PDMA_MODE)

#define ES_PDVCONT   EMAPI(EDTS_PDVCONT)

#define ES_PDVDPATH   EMAPI(EDTS_PDVDPATH)

#define ES_PROCESS_ISR   EMAPI(EDTS_PROCESS_ISR)

#define ES_PROG   EMAPI(EDTS_PROG)

#define ES_PROG_READBACK   EMAPI(EDTS_PROG_READBACK)

#define ES_PROG_XILINX   EMAPI(EDTS_PROG_XILINX)

#define ES_RAW_SGLIST   EMAPI(EDTS_RAW_SGLIST)

#define ES_RCI_CHAN   EMAPI(EDTS_RCI_CHAN)

#define ES_READ_END_DELAYS   EMAPI(EDTS_READ_END_DELAYS)

#define ES_READ_ENDACT   EMAPI(EDTS_READ_ENDACT)

#define ES_READ_START_DELAYS   EMAPI(EDTS_READ_START_DELAYS)

#define ES_READ_STARTACT   EMAPI(EDTS_READ_STARTACT)

#define ES_REFTIME   EMAPI(EDTS_REFTIME)

#define ES_REFTMSTAMP   EMAPI(EDTS_REFTMSTAMP)

#define ES_REG   EMAPI(EDTS_REG)

#define ES_REG_AND   EMAPI(EDTS_REG_AND)

#define ES_REG_BIT_CLEARSET   EMAPI(EDTS_REG_BIT_CLEARSET)

#define ES_REG_BIT_SETCLEAR   EMAPI(EDTS_REG_BIT_SETCLEAR)

#define ES_REG_OR   EMAPI(EDTS_REG_OR)

#define ES_REG_READBACK   EMAPI(EDTS_REG_READBACK)

#define ES_RESET_EVENT_COUNTER   EMAPI(EDTS_RESET_EVENT_COUNTER)

#define ES_RESETCOUNT   EMAPI(EDTS_RESETCOUNT)

#define ES_RESETSERIAL   EMAPI(EDTS_RESETSERIAL)

#define ES_RESUME   EMAPI(EDTS_RESUME)

#define ES_RTIMEOUT   EMAPI(EDTS_RTIMEOUT)

#define ES_SERIAL   EMAPI(EDTS_SERIAL)

#define ES_SERIAL_FIFO   EMAPI(EDTS_SERIAL_FIFO)

#define ES_SERIALWAIT   EMAPI(EDTS_SERIALWAIT)

#define ES_SETBUF   EMAPI(EDTS_SETBUF)

#define ES_SGLIST   EMAPI(EDTS_SGLIST)

#define ES_SOLARIS_DMA_MODE   EMAPI(EDTS_SOLARIS_DMA_MODE)

#define ES_STARTACT   EMAPI(EDTS_STARTACT)

#define ES_STARTBUF   EMAPI(EDTS_STARTBUF)

#define ES_STARTDMA   EMAPI(EDTS_STARTDMA)

#define ES_STOPBUF   EMAPI(EDTS_STOPBUF)

#define ES_SYNC   EMAPI(EDTS_SYNC)

#define ES_SYNC_INTERVAL   EMAPI(EDTS_SYNC_INTERVAL)

#define ES_TEST_LOCK_ON   EMAPI(EDTS_TEST_LOCK_ON)

#define ES_TEST_STATUS   EMAPI(EDTS_TEST_STATUS)

#define ES_TIMEOUT_ACTION   EMAPI(EDTS_TIMEOUT_ACTION)

#define ES_TIMEOUT_OK   EMAPI(EDTS_TIMEOUT_OK)

#define ES_TIMESTAMP_LEVEL   EMAPI(EDTS_TIMESTAMP_LEVEL)

#define ES_TIMETYPE   EMAPI(EDTS_TIMETYPE)

#define ES_TRACE_CLEAR   EMAPI(EDTS_TRACE_CLEAR)

#define ES_TRACE_REG   EMAPI(EDTS_TRACE_REG)

#define ES_TRACE_SIZE   EMAPI(EDTS_TRACE_SIZE)

#define ES_TYPE   EMAPI(EDTS_TYPE)

#define ES_UMEM_LOCK   EMAPI(EDTS_UMEM_LOCK)

#define ES_UNUSED0   EMAPI(EDTS_UNUSED0)

#define ES_USER_DMA_WAKEUP   EMAPI(EDTS_USER_DMA_WAKEUP)

#define ES_USER_FUNC   EMAPI(EDTS_USER_FUNC)

#define ES_WAIT_DIRECT_DMA_DONE   EMAPI(EDTS_WAIT_DIRECT_DMA_DONE)

#define ES_WAIT_EVENT   EMAPI(EDTS_WAIT_EVENT)

#define ES_WAIT_EVENT_ONCE   EMAPI(EDTS_WAIT_EVENT_ONCE)

#define ES_WAIT_STATUS   EMAPI(EDTS_WAIT_STATUS)

#define ES_WAITBUF   EMAPI(EDTS_WAITBUF)

#define ES_WAITCHAR   EMAPI(EDTS_WAITCHAR)

#define ES_WAITN   EMAPI(EDTS_WAITN)

#define ES_WRITE_END_DELAYS   EMAPI(EDTS_WRITE_END_DELAYS)

#define ES_WRITE_ENDACT   EMAPI(EDTS_WRITE_ENDACT)

#define ES_WRITE_PIO   EMAPI(EDTS_WRITE_PIO)

#define ES_WRITE_START_DELAYS   EMAPI(EDTS_WRITE_START_DELAYS)

#define ES_WRITE_STARTACT   EMAPI(EDTS_WRITE_STARTACT)

#define ES_WTIMEOUT   EMAPI(EDTS_WTIMEOUT)

#define ESN_SIZE   64

#define EV_EODMA   EDT_EODMA_EVENT

#define event_t   HANDLE

#define EXTRAADDR_SIZE   4

#define EXTRATAG_SIZE   4

#define FALSE   0

#define has_pcda_direction_bit(edt_p)   (ID_HAS_PCD_DIR_BIT(edt_p->devid))

#define HDR_TYPE_BUFHEADER   4

#define HDR_TYPE_FRAMECNT   2

#define HDR_TYPE_IRIG1   1

#define HDR_TYPE_IRIG2   3

#define HDR_TYPE_NONE   0

#define ID_HAS_16BIT_PROM(id)

#define ID_HAS_CHANREG(id)   (ID_HAS_MEZZ(id) || (id == PCDA_ID))

#define ID_HAS_COMBINED_FPGA(id)

#define ID_HAS_IRIGB(id)

#define ID_HAS_MEZZ(id)   (ID_IS_SS(id) || ID_IS_GS(id) || ID_IS_LX(id)) || id == PE8G2V7_ID

#define ID_HAS_PCD_DIR_BIT(id)

#define ID_IS_1553(id)

#define ID_IS_16CHANNEL(id)

#define ID_IS_1LANE(id)

#define ID_IS_1OR4CHANNEL(id)

#define ID_IS_2CHANNEL(id)

#define ID_IS_32CHANNEL(id)   ( (id == PE8LX32_ID))

#define ID_IS_3CHANNEL(id)

#define ID_IS_4CHANNEL(id)

#define ID_IS_4LANE(id)

#define ID_IS_8LANE(id)

#define ID_IS_DUMMY(id)

#define ID_IS_DVCL(id)

#define ID_IS_DVCL2(id)

#define ID_IS_DVCLS(id)

#define ID_IS_DVFOX(id)

#define ID_IS_FCIUSPS(id)

#define ID_IS_GS(id)

#define ID_IS_LCRBLADE(id)

#define ID_IS_LX(id)

#define ID_IS_MICRON_PROM(id)

#define ID_IS_MULTICHAN(id)

#define ID_IS_PCD(id)

#define ID_IS_PCIE_DVFOX(id)

#define ID_IS_PDV(id)

#define ID_IS_SS(id)

#define ID_IS_UNKNOWN(id)

#define ID_STORES_MACADDRS(id)

#define LCR_DDC_REG_SPACE   (0x08 << 19)

#define MACADDR_SIZE   12

#define MACLIST_SIZE   216

#define MAX_DMA_BUFFERS   2048

#define MAX_EXTENDED_WORDS   32

#define MAX_LOCK_SRC   60

#define MAX_MACADDRS   16

#define MIC_N25Q064A13ESE40G   25

#define MICRON_PROMINFO_ADDR   0x7f0000

#define MIN_PCI_IOCTL   300

#define N_DBG_STATES   24

#define OPTSN_SIZE   32

#define OSN_SIZE   32

#define P11_ATT_SIG   1

#define P11_CNT_SIG   2

#define P16_DINT_SIG   1

#define P53B_INTERVAL_SIG   2

#define P53B_MODECODE_SIG   3

#define P53B_REGTEST   EIOC(66, EIO_SET, sizeof(p53b_test))

#define P53B_SRQ_SIG   1

#define P_REGTEST   EMAPI(P53B_REGTEST)

#define PCD_STAT1_SIG   1

#define PCD_STAT2_SIG   2

#define PCD_STAT3_SIG   3

#define PCD_STAT4_SIG   4

#define PCD_STATX_SIG   5

#define PCI_ID_SIZE   128

#define PCIE_INFO_SIZE   1024

#define PCIE_PID_SIZE   128

#define PCIIOC(action, type, size)   EIOC(action+MIN_PCI_IOCTL, type, size)

#define PROM_EXTRA_SIZE   512

#define PROM_UNKN   0

#define SIZED_DATASIZE   (EDT_DEPSIZE - sizeof(u_int))

#define SPI_SECTOR_SIZE   0x100000

#define SPI_XC3S1200E   9

#define TRL_CRITICAL   1

#define TRL_ERROR   2

#define TRL_FATAL   1

#define TRL_INFO   4

#define TRL_NONE   0

#define TRL_REALVERBOSE   6

#define TRL_RESERVED7   7

#define TRL_RESERVED8   8

#define TRL_RESERVED9   9

#define TRL_VERBOSE   5

#define TRL_WARN   3

#define TRUE   1

#define USE_EVENT_HANDLERS

#define XLA_SECTOR_SIZE   AMD_SECTOR_SIZE

Typedefs

typedef u_int bufcnt_t

typedef char edt_bitpath [128]

typedef char edt_version_string [128]

typedef int(*) EdtBdFilterFunction (char *dev, int unit, int bd_id, void *data)

typedef void(*) EdtEventFunc (void *)

Enumerations

enum EdtIOPort

Values that represent a port on a card. More...

enum EdtLoadState

Functions

int edt_abort_current_dma (EdtDev *edt_p)

Stops the current transfers, resets the ring buffer pointers to the next buffer.

int edt_abort_dma (EdtDev *edt_p)

Stops any transfers currently in progress, resets the ring buffer pointers to restart on the current buffer.

int edt_access (char *fname, int perm)

Determines file access, independent of operating system.

EdtPromParmBlock * edt_add_parmblock (EdtPromData *pdata, char *type, int datasize)

unsigned int edt_allocated_size (EdtDev *edt_p, int bufnum)

Gets the allocated size of the specified buffer.

u_int edt_bar1_read (EdtDev *edt_p, u_int offset)

A convenience routine to access the EDT BAR1 registers.

void edt_bar1_write (EdtDev *edt_p, u_int offset, u_int val)

A convenience routine to access the EDT BAR1 registers.

unsigned char ** edt_buffer_addresses (EdtDev *edt_p)

Returns an array containing the addresses of the ring buffers.

int edt_cancel_current_dma (EdtDev *edt_p)

int edt_check_1_vs_4 (EdtDev *edt_p)

Determines whether a board's PCI firmware is 4-channel or 1-channel.

unsigned char * edt_check_for_buffers (EdtDev *edt_p, uint_t count)

Checks whether the specified number of buffers have completed without blocking.

int edt_check_version (EdtDev *edt_p)

compares version strings between library and driver, returns 0 if they aren't the same

int edt_close (EdtDev *edt_p)

u_char edt_clr_funct_bit (EdtDev *edt_p, u_char mask)

u_char edt_clr_pllct_bit (EdtDev *edt_p, u_char mask)

int edt_configure_block_buffers (EdtDev *edt_p, int bufsize, int numbufs, int write_flag, int header_size, int header_before)

Configures the EDT device ring buffers.

int edt_configure_block_buffers_mem (EdtDev *edt_p, int bufsize, int numbufs, int write_flag, int header_size, int header_before, u_char *user_mem)

Identical to edt_configure_block_buffers, with the additional parameter user_mem, which allows the user to specify a block of pre-allocated memory to use (Note: this does not work on Linux).

int edt_configure_channel_ring_buffers (EdtDev *edt_p, int bufsize, int numbufs, int write_flag, unsigned char **bufarray)

int edt_configure_ring_buffers (EdtDev *edt_p, int bufsize, int numbufs, int write_flag, unsigned char **bufarray)

Configures the EDT device ring buffers.

int edt_device_id (EdtDev *edt_p)

Gets the device ID of the specified device.

int edt_devtype_from_id (int id)

Converts the board ID returned by edt_device_id to a human readable form.

int edt_disable_channel (EdtDev *edt_p, u_int channel)

Clears a specified mezzanine channel enable bit.

int edt_disable_channels (EdtDev *edt_p, u_int mask)

Clears specified mezzanine channel enable bits.

int edt_disable_ring_buffer (EdtDev *edt_p, int nIndex)

int edt_disable_ring_buffers (EdtDev *edt_p)

Disables the EDT device ring buffers.

void edt_dmasync_forcpu (EdtDev *edt, int bufnum, int offset, int bytecount)

void edt_dmasync_fordev (EdtDev *edt, int bufnum, int offset, int bytecount)

int edt_do_timeout (EdtDev *edt_p)

Causes the driver to perform the same actions as it would on a timeout (causing partially filled fifos to be flushed and dma to be aborted).

bufcnt_t edt_done_count (EdtDev *edt_p)

Returns the cumulative count of completed buffer transfers in ring buffer mode.

int edt_enable_channel (EdtDev *edt_p, u_int channel)

Sets a specified mezzanine channel enable bit.

int edt_enable_channels (EdtDev *edt_p, u_int mask)

Sets specified mezzanine channel enable bits.

int edt_enable_event (EdtDev *edt_p, int event_type)

void edt_enddma_action (EdtDev *edt_p, uint_t val)

Specifies when to perform the action at the end of a dma transfer as specified by edt_enddma_reg.

void edt_enddma_reg (EdtDev *edt_p, uint_t desc, uint_t val)

Sets the register and value to use at the end of dma, as set by edt_enddma_action.

const char * edt_envvar_from_devstr (const char *devstr)

const char * edt_envvar_from_devtype (const int devtype)

u_int edt_errno (void)

Returns an operating system-dependent error number.

int edt_find_xpn (char *part_number, char *fpga)

Reads the default part number->fpga cross-reference file edt_parts.xpn in the current directory, and provides the FPGA if a match is found.

void edt_flash_byte_program (EdtDev *edt_p, u_int addr, u_char data, int isbt)

int edt_flash_get_debug_fast (void)

int edt_flash_get_do_fast (void)

int edt_flash_get_fname (EdtDev *edt_p, char *name)

Extract the name of the on-board firmware in the device's FPGA PROM, minus the extension.

int edt_flash_get_fname_auto (EdtDev *edt_p, char *name)

Extract the name of the on-board firmware in the device's FPGA PROM, minus the version and extension.

int edt_flash_get_force_slow (void)

u_int edt_flash_get_promaddrs (EdtDev *edt_p, int promcode, int segment, EdtPromIdAddresses *paddr)

int edt_flash_is_protected (EdtDev *edt_p)

void edt_flash_print16 (EdtDev *edt_p, u_int addr, int ftype)

void edt_flash_program_prominfo (EdtDev *edt_p, int promcode, int sector, EdtPromData *pdata)

int edt_flash_prom_detect (EdtDev *edt_p, u_short *stat)

Find the flash prom and flash status (jumper positions) for the device.

u_char edt_flash_read8 (EdtDev *edt_p, u_int addr, int ftype)

void edt_flash_reset (EdtDev *edt_p, int isbt)

int edt_flash_set_debug_fast (int val)

void edt_flash_set_do_fast (int val)

void edt_flash_set_force_slow (int val)

char * edt_flash_type_string (int ftype)

void edt_flash_verify (EdtDev *edt_p, u_int addr, u_char *data, int nbytes, int ftype)

u_char edt_flipbits (u_char val)

void edt_flush_channel (EdtDev *edt_p, int channel)

void edt_flush_fifo (EdtDev *edt_p)

Flushes the board's input and output FIFOs, to allow new data transfers to start from a known state.

int edt_get_bitname (EdtDev *edt_p, char *bitpath, int size)

Obtains the name of the currently loaded interface bitfile from the driver.

int edt_get_bitpath (EdtDev *edt_p, char *bitpath, int size)

Obtains pathname to the currently loaded interface bitfile from the driver.

u_int edt_get_board_id (EdtDev *edt_p)

Gets the mezzanine id.

u_int edt_get_bufbytecount (EdtDev *edt_p, u_int *cur_buffer)

Atomically returns the number of bytes read so far into the current buffer along with the associated buffer number in the second argument.

int edt_get_burst_enable (EdtDev *edt_p)

Returns the value of the burst enable flag, determining whether the DMA master transfers as many words as possible at once, or transfers them one at a time as soon as the data is acquired.

uint_t edt_get_bytecount (EdtDev *edt_p)

OBSOLETE: Use edt_get_bufbytecount(edt_p, &bufnum) instead.

unsigned char * edt_get_current_dma_buf (EdtDev *edt_p)

edt_current_dma_buf

int edt_get_debug (EdtDev *edt_p)

int edt_get_dependent (EdtDev *edt_p, void *addr)

unsigned short edt_get_direction (EdtDev *edt_p)

Gets the value of the PCD_DIRA and PCD_DIRB registers.

u_int edt_get_dma_info (EdtDev *edt_p, edt_dma_info *dmainfo)

Gets information about active dma.

int edt_get_driver_buildid (EdtDev *edt_p, char *build, int size)

Gets the full build ID of the EDT library.

int edt_get_driver_version (EdtDev *edt_p, char *versionstr, int size)

Gets the version of the EDT driver.

u_int edt_get_drivertype (EdtDev *edt_p)

int edt_get_dump_reg_access ()

void edt_get_esn (EdtDev *edt_p, char *esn)

Retrieve the board's embedded information string from the PCI xilinx information header.

int edt_get_firstflush (EdtDev *edt_p)

OBSOLETE.

char * edt_get_flash_prom_header (EdtDev *edt_p, char *name)

const char * edt_get_fpga_mfg (EdtDev *edt_p)

Returns in string form (character array) the FPGA manufacturer.

u_int edt_get_full_board_id (EdtDev *edt_p, int *extended_n, int *rev_id, u_int *extended_data)

Gets the mezzanine id including extended data.

int edt_get_goodbits (EdtDev *edt_p)

Returns the current number of good bits in the last long word of a read buffer (0 through 31).

u_int edt_get_id_addr (int promcode, int segment)

u_int edt_get_intr_mask (EdtDev *edt_p)

int edt_get_kernel_buffers (EdtDev *edt_p)

char * edt_get_last_bitpath (EdtDev *edt_p)

int edt_get_library_buildid (EdtDev *edt_p, char *build, int size)

Gets the full build ID of the EDT library.

int edt_get_library_version (EdtDev *edt_p, char *versionstr, int size)

Gets the version (number and date) of the EDT library.

u_int edt_get_mappable_size (EdtDev *edt_p, int bar)

int edt_get_max_buffers (EdtDev *edt_p)

Get the maximum number of ring buffers that can be allocated.

int edt_get_mezz_bitpath (EdtDev *edt_p, char *bitpath, int size)

Obtains pathname to the currently loaded mezzanine bitfile from the driver.

int edt_get_mezz_chan_bitpath (EdtDev *edt_p, char *bitpath, int size, int channel)

Obtains pathname to the currently loaded mezzanine bitfile from the driver.

u_int edt_get_mezz_id (EdtDev *edt_p)

int edt_get_mmap_buffers (EdtDev *edt_p)

int edt_get_msg (EdtDev *edt_p, char *msgbuf, int maxsize)

Gets a message using the serial port of the current unit & channel.

int edt_get_msg_unit (EdtDev *edt_p, char *msgbuf, int maxsize, int unit)

int edt_get_numbufs (EdtDev *edt_p)

edt_get_numbufs

void edt_get_osn (EdtDev *edt_p, char *osn)

Retrieve the board OEM's embedded information string from the PCI xilinx information header.

EdtPromParmBlock * edt_get_parms_block (EdtPromData *pdata, char *id)

int edt_get_persistent_buffers (EdtDev *edt_p)

int edt_get_port (EdtDev *edt_p)

Routine to get the "port" number, as distinct from the dma channel.

Edt_prominfo * edt_get_prominfo (int promcode)

Returns the pciload device information structure for the specific flash PROM code given.

int edt_get_rci_chan (EdtDev *edt_p, int unit)

int edt_get_rci_dma (EdtDev *edt_p, int unit)

int edt_get_reftime (EdtDev *edt_p, u_int *timep)

Gets the seconds and nanoseconds timestamp in the same format as the buffer_timed functions.

u_int edt_get_remote_intr (EdtDev *edt_p)

int edt_get_rtimeout (EdtDev *edt_p)

Gets the current read timeout value: the number of milliseconds to wait for DMA reads to complete before returning.

void edt_get_sns (EdtDev *edt_p, char *esn, char *osn)

void edt_get_sns_sector (EdtDev *edt_p, char *esn, char *osn, int sector)

Retrieve the board's manufacturer and OEM embedded information strings strings from the PCI xilinx information header.

uint_t edt_get_timeout_count (EdtDev *edt_p)

Returns the number of bytes transferred at last timeout.

int edt_get_timeout_goodbits (EdtDev *edt_p)

Returns the number of good bits in the last long word of a read buffer after the last timeout.

int edt_get_timeout_ok (EdtDev *edt_p)

int edt_get_timestamp (EdtDev *edt_p, u_int *timep, u_int bufnum)

Gets the seconds and nanoseconds timestamp of when dma was completed on the buffer specified by bufnum.

uint_t edt_get_todo (EdtDev *edt_p)

Gets the number of buffers that the driver has been told to acquire.

int edt_get_total_bufsize (EdtDev *edt_p, int bufsize, int header_size)

edt_get_total_bufsize

u_int edt_get_version_number ()

int edt_get_wait_status (EdtDev *edt_p)

int edt_get_wtimeout (EdtDev *edt_p)

Gets the current write timeout value: the number of milliseconds to wait for DMA writes to complete before returning.

int edt_get_xref_info (const char *path, const char *pn, char *fpga, char *sn, char *mtype, char *moffs, char *mcount, char *desc, char *rsvd1, char *rsvd2)

Reads a part number->fpga cross-reference file and provides the fpga and base serial number if a match is found.

int edt_had_user_dma_wakeup (EdtDev *edt_p)

const char * edt_home_dir (EdtDev *edt_p)

char * edt_idstr (int id)

Converts the board ID returned by edt_device_id to a human readable form (original version, sans promcode).

char * edt_idstring (int id, int promcode)

Converts the board ID returned by edt_device_id to a human readable form (new version, with promcode).

uchar_t edt_intfc_read (EdtDev *edt_p, uint_t offset)

A convenience routine, partly for backward compatability, to access the user interface XILINX registers.

uint_t edt_intfc_read_32 (EdtDev *edt_p, uint_t offset)

A convenience routine, partly for backward compatability, to access the user interface XILINX registers.

u_short edt_intfc_read_short (EdtDev *edt_p, uint_t offset)

A convenience routine, partly for backward compatability, to access the user interface XILINX registers.

void edt_intfc_write_32 (EdtDev *edt_p, uint_t offset, uint_t val)

A convenience routine, partly for backward compatability, to access the user interface XILINX registers.

void edt_intfc_write_short (EdtDev *edt_p, uint_t offset, u_short val)

A convenience routine, partly for backward compatability, to access the user interface XILINX registers.

int edt_ioctl (EdtDev *, int code, void *arg)

edt_ioctl

int edt_ioctl_nt (EdtDev *edt_p, int controlCode, void *inBuffer, int inSize, void *outBuffer, int outSize, int *bytesReturned)

unsigned char * edt_last_buffer (EdtDev *edt_p)

Waits for the last buffer that has been transferred.

unsigned char * edt_last_buffer_timed (EdtDev *edt_p, u_int *timep)

Like edt_last_buffer but also returns the time at which the DMA was complete on this buffer.

u_int edt_lcr_read (EdtDev *edt_p, unsigned int regBlock, unsigned int regOffset)

A convenience routine to access the EDT LCR registers.

void edt_lcr_write (EdtDev *edt_p, unsigned int regBlock, unsigned int regOffset, unsigned int regVal)

A convenience routine to access the EDT LCR registers.

int edt_little_endian (void)

int edt_lockoff (EdtDev *edt_p)

caddr_t edt_map_dmamem (EdtDev *edt_p)

caddr_t edt_mapmem (EdtDev *edt_p, u_int addr, int size)

int edt_mic_is_protected (EdtDev *edt_p)

unsigned char * edt_next_writebuf (EdtDev *edt_p)

Returns a pointer to the next buffer scheduled for output DMA, in order to fill the buffer with data.

uint_t edt_next_writebuf_index (EdtDev *edt_p)

Returns the index of the next buffer scheduled for output DMA, in order to fill the buffer with data.

EdtDev * edt_open (const char *device_name, int unit)

Opens the specified EDT Product and sets up the device handle.

EdtDev * edt_open_channel (const char *device_name, int unit, int channel)

Opens a specific DMA channel on the specified EDT Product, when multiple channels are supported by the Xilinx firmware, and sets up the device handle.

EdtDev * edt_open_device (const char *device_name, int unit, int channel, int verbose)

EdtDev * edt_open_quiet (const char *device_name, int unit)

Just a version of edt_open that does so quietly, so we can try opening the device just to see if it's there without a lot of printfs coming out.

uint_t edt_overflow (EdtDev *edt_p)

int edt_parse_devinfo (char *str, Edt_embinfo *ei)

Parse the board's embedded information string.

int edt_parse_esn (char *str, Edt_embinfo *ei)

int edt_parse_unit (const char *str, char *dev, const char *default_dev)

Parses an EDT device name string.

int edt_parse_unit_channel (const char *str, char *dev, const char *default_dev, int *channel)

parse -u argument returning the device and unit.

int edt_pci_reboot (EdtDev *edt_p)

reboot the PCI xilinx

void edt_perror (char *str)

Formats and prints a system error.

int edt_program_flash (EdtDev *edt_p, const u_char *buf, int size, int do_sleep)

Program the interface fpga flash PROM.

int edt_read (EdtDev *edt_p, void *buf, uint_t size)

Performs a read on the EDT Product.

void edt_read_end_action (EdtDev *edt_p, u_int enable, u_int reg_desc, u_char set, u_char clear, u_char setclear, u_char clearset, int delay1, int delay2)

Enables an action where a specified register will be programmed with a specified value at the end of a dma read operation.

void edt_read_prom_data (EdtDev *edt_p, int promcode, int segment, EdtPromData *pdata)

Get the onboard PROM device info, as written to unused PROM space by EDT before shipping, or thereafter via -I or -i options to pciload.

void edt_read_start_action (EdtDev *edt_p, u_int enable, u_int reg_desc, u_char set, u_char clear, u_char setclear, u_char clearset, int delay1, int delay2)

Enables an action where a specified register will be programmed with a specified value at the start of a dma read operation.

void edt_readinfo (EdtDev *edt_p, int promcode, int sect, char *idstr, char *devinfo, char *oemsn)

int edt_ref_tmstamp (EdtDev *edt_p, u_int val)

Causes application-defined events to show up in the same timeline as driver events when the event history is listed by running setdebug -g.

uint_t edt_reg_and (EdtDev *edt_p, uint_t desc, uint_t val)

Performs a bitwise logical AND of the value of the specified register and the value provided in the argument; the result becomes the new value of the register.

void edt_reg_clearset (EdtDev *edt_p, uint_t desc, uint_t val)

Toggles the bits specified in the mask argument off then on in a single ioctl call.

uint_t edt_reg_or (EdtDev *edt_p, uint_t desc, uint_t val)

Performs a bitwise logical OR of the value of the specified register and the value provided in the argument; the result becomes the new value of the register.

uint_t edt_reg_read (EdtDev *edt_p, uint_t desc)

Reads the specified register and returns its value.

void edt_reg_setclear (EdtDev *edt_p, uint_t desc, uint_t val)

Toggles the bits specified in the mask argument on then off in a single ioctl call.

void edt_reg_write (EdtDev *edt_p, uint_t desc, uint_t val)

Write the specified value to the specified register.

int edt_remove_event_func (EdtDev *edt_p, int event_type)

Removes an event function previously set with edt_set_event_func.

void edt_reset_counts (EdtDev *edt_p)

int edt_reset_event_counter (EdtDev *edt_p, int event_type)

Added 09/24/99 Mark.

int edt_reset_ring_buffers (EdtDev *edt_p, uint_t bufnum)

Stops any DMA currently in progress, then resets the ring buffer to start the next DMA at bufnum.

void edt_reset_serial (EdtDev *edt_p)

void edt_resume (EdtDev *edt_p)

int edt_ring_buffer_overrun (EdtDev *edt_p)

Returns true (1) when DMA has wrapped around the ring buffer and overwritten the buffer which the application is about to access.

int edt_sector_erase (EdtDev *edt_p, u_int sector, u_int sec_size, int type)

int edt_send_msg (EdtDev *edt_p, int unit, const char *msg, int size)

send a message

int edt_serial_wait (EdtDev *edt_p, int size, int timeout)

void edt_set_abortintr (EdtDev *edt_p, u_int val)

int edt_set_autodir (EdtDev *edt_p, int val)

int edt_set_bitpath (EdtDev *edt_p, const char *bitpath)

Sets pathname to the currently loaded user interface bitfile in the driver.

int edt_set_buffer (EdtDev *edt_p, uint_t bufnum)

Sets which buffer should be started next.

void edt_set_buffer_granularity (EdtDev *edt_p, u_int granularity)

int edt_set_buffer_physaddr (EdtDev *edt_p, uint_t index, uint64_t physaddr)

int edt_set_buffer_size (EdtDev *edt_p, uint_t which_buf, uint_t size, uint_t write_flag)

Used to change the size or direction of one of the ring buffers.

int edt_set_burst_enable (EdtDev *edt_p, int on)

Sets the burst enable flag, determining whether the DMA master transfers as many words as possible at once, or transfers them one at a time as soon as the data is acquired.

int edt_set_continuous (EdtDev *edt_p, int on)

int edt_set_debug (EdtDev *edt_p, int count)

int edt_set_dependent (EdtDev *edt_p, void *addr)

void edt_set_direction (EdtDev *edt_p, int direction)

On PCD cards, sets DMA direction to read or write.

int edt_set_drivertype (EdtDev *edt_p, u_int type)

void edt_set_dump_ir_access (u_int on)

void edt_set_dump_reg_access (int on)

void edt_set_dump_reg_address (u_int reglow, u_int n, u_int on)

int edt_set_eodma_int (EdtDev *edt_p, int sig)

int edt_set_event_func (EdtDev *edt_p, int event_type, EdtEventFunc f, void *data, int continuous)

Defines a function to call when an event occurs.

int edt_set_firstflush (EdtDev *edt_p, int val)

Tells whether and when to flush the FIFOs before DMA transfer.

u_char edt_set_funct_bit (EdtDev *edt_p, u_char mask)

int edt_set_ignore_signals (EdtDev *edt_p, int ignore)

void edt_set_intr_mask (EdtDev *edt_p, u_int state)

int edt_set_kernel_buffers (EdtDev *edt_p, int onoff)

int edt_set_max_buffers (EdtDev *edt_p, int newmax)

Change the maximum number of ring buffers that can be allocated.

int edt_set_merge (EdtDev *edt_p, u_int size, int span, u_int offset, u_int count)

set merge params

int edt_set_mezz_bitpath (EdtDev *edt_p, const char *bitpath)

Sets pathname to the currently loaded mezzanine bitfile in the driver.

int edt_set_mezz_chan_bitpath (EdtDev *edt_p, const char *bitpath, int channel)

Sets pathname to the currently loaded mezzanine bitfile in the driver.

u_int edt_set_mezz_id (EdtDev *edt_p)

int edt_set_mmap_buffers (EdtDev *edt_p, int onoff)

void edt_set_out_clk (EdtDev *edt_p, edt_pll *clk_data)

int edt_set_persistent_buffers (EdtDev *edt_p, int onoff)

u_char edt_set_pllct_bit (EdtDev *edt_p, u_char mask)

void edt_set_port (EdtDev *edt_p, int port)

Routine to set the "port" number, as distinct from the dma channel.

int edt_set_rci_chan (EdtDev *edt_p, int unit, int channel)

int edt_set_rci_dma (EdtDev *edt_p, int unit, int channel)

void edt_set_remote_intr (EdtDev *edt_p, u_int onoff)

int edt_set_rtimeout (EdtDev *edt_p, int value)

Sets the number of milliseconds for data read calls, such as edt_read, to wait for DMA to complete before returning.

u_int edt_set_sgbuf (EdtDev *edt_p, u_int sgbuf, u_int bufsize, u_int bufdir, u_int verbose)

int edt_set_sync_interval (EdtDev *edt_p, u_int interval)

For large buffers on systems with bounce buffers (i.e.

int edt_set_timeout_action (EdtDev *edt_p, u_int action)

Sets the driver behavior on a timeout.

int edt_set_timeout_ok (EdtDev *edt_p, int val)

void edt_set_timetype (EdtDev *edt_p, u_int type)

void edt_set_trace_regs (EdtDev *edt_p, u_int reg_def, u_int state)

Enable or disable tracing a single reg access.

int edt_set_wtimeout (EdtDev *edt_p, int value)

Sets the number of milliseconds for data write calls, such as edt_write, to wait for DMA to complete before returning.

int edt_start_buffers (EdtDev *edt_p, uint_t count)

Starts DMA to the specified number of buffers.

void edt_startdma_action (EdtDev *edt_p, uint_t val)

Specifies when to perform the action at the start of a dma transfer as specified by edt_startdma_reg.

void edt_startdma_reg (EdtDev *edt_p, uint_t desc, uint_t val)

Sets the register and value to use at the start of dma, as set by edt_startdma_action.

int edt_stop_buffers (EdtDev *edt_p)

Stops DMA transfer after the current buffer has completed.

int edt_system (const char *cmdstr)

Performs a UNIX-like system() call which passes the argument strings to a shell or command interpreter, then returns the exit status of the command or the shell so that errors can be detected.

int edt_timeouts (EdtDev *edt_p)

Returns the number of read and write timeouts that have occurred since the last call of edt_open.

char * edt_timestring (u_int *timep)

void edt_trace_regs_enable (EdtDev *edt_p, u_int state)

int edt_user_dma_wakeup (EdtDev *edt_p)

unsigned char * edt_wait_buffers_timed (EdtDev *edt_p, int count, u_int *timep)

Blocks until the specified number of buffers have completed with a pointer to the time the last buffer finished.

int edt_wait_event (EdtDev *edt_p, int event_type, int timeoutval)

unsigned char * edt_wait_for_buffers (EdtDev *edt_p, int count)

Blocks until the specified number of buffers have completed.

unsigned char * edt_wait_for_next_buffer (EdtDev *edt_p)

Waits for the next buffer that finishes DMA.

int edt_write (EdtDev *edt_p, void *buf, uint_t size)

Perform a write on the EDT Product.

void edt_write_end_action (EdtDev *edt_p, u_int enable, u_int reg_desc, u_char set, u_char clear, u_char setclear, u_char clearset, int delay1, int delay2)

Enables an action where a specified register will be programmed with a specified value at the end of a dma write operation.

int edt_write_pio (EdtDev *edt_p, u_char *buf, int size)

void edt_write_start_action (EdtDev *edt_p, u_int enable, u_int reg_desc, u_char set, u_char clear, u_char setclear, u_char clearset, int delay1, int delay2)

Enables an action where a specified register will be programmed with a specified value at the start of a dma write operation.

int edtdev_channels_from_type (EdtDev *edt_p)

edtdev_channels_from_type

int initpcd_str (char *cfg_str, int unit, int verbose)

void pcd_flush_channel (EdtDev *edt_p, int channel)

unsigned char pcd_get_cmd (EdtDev *edt_p)

uchar_t pcd_get_funct (EdtDev *edt_p)

uchar_t pcd_get_stat (EdtDev *edt_p)

uchar_t pcd_get_stat_polarity (EdtDev *edt_p)

void pcd_set_byteswap (EdtDev *edt_p, int val)

Enumeration Type Documentation

enum EdtIOPort

Values that represent a port on a card.

This is to enforce typed access in C++

Definition at line 2652 of file libedt.h.

Function Documentation

int edt_check_1_vs_4 ( EdtDev * edt_p )

Determines whether a board's PCI firmware is 4-channel or 1-channel.

Parameters:

edt_p

pointer to device structure

Returns:: either 1 or 4 depending on number of channels.

Since we can't tell from the PCI vendor id whether a PCI bitfile for the PCI SS or GS is the one-channel or four-channel type, this parses the name for a 1 or a 4.

Definition at line 7304 of file libedt.c.

int edt_flash_get_fname	(	EdtDev *	edt_p,
		char *	name
	)

Extract the name of the on-board firmware in the device's FPGA PROM, minus the extension.

Fills in the name string field with the name of the device's onboard PROM, minus the voltage descriptor if any, and extension (.ncd). For devices with two voltage sectors to the firmware, two files with _3v.ncd and _5v.ncd extensions will be present; in such cases the _3v and _5v will be stripped off as well. For example if the device is loaded with "pcidev-10_3v.ncd" and "pcidev-10_5v.ncd", the subroutine will return "pcidev-10".

Parameters:

	edt_p	pointer to edt device structure returned by edt_open
	name	FPGA filename

See also:: edt_flash_get_fname_auto

Definition at line 868 of file edt_flash.c.

int edt_flash_get_fname_auto	(	EdtDev *	edt_p,
		char *	name
	)

Extract the name of the on-board firmware in the device's FPGA PROM, minus the version and extension.

Fills in the name string field with the name of the device's onboard PROM, minus the version, voltage descriptor if any, and extension (.ncd). For devices with two voltage sectors to the firmware, two files with _3v.ncd and _5v.ncd extensions will be present; in such cases _3v and _5v will be stripped off as well. For example if the device is loaded with "pcidev-10_3v.ncd" and "pcidev-10_5v.ncd", the subroutine will return "pcidev".

Parameters:

	edt_p	pointer to edt device structure returned by edt_open
	name	FPGA filename

See also:: edt_flash_get_fname

Definition at line 938 of file edt_flash.c.

int edt_flash_prom_detect	(	EdtDev *	edt_p,
		u_short *	stat
	)

Find the flash prom and flash status (jumper positions) for the device.

Finds out which flash PROM is used and queries the device PROM status -- see EPinfo stat field for status bits values

Parameters:

	edt_p	pointer to edt device structure returned by edt_open
	stat	device status (register value)

Returns:: prom device index -- see "Legal device proms" in libedt.h & EPinfo table at the top of file

Definition at line 2274 of file edt_flash.c.

u_int edt_get_bufbytecount	(	EdtDev *	edt_p,
		u_int *	cur_buffer
	)

Atomically returns the number of bytes read so far into the current buffer along with the associated buffer number in the second argument.

Can be used to monitor how much data has been read into the buffer during acquisition.

Parameters:

	edt_p	pointer to edt device structure returned by edt_open or edt_open_channel
	cur_buffer	pointer to variable to receive applicable buffer number

Returns:: The number of bytes transferred, as described above, plus buffer number by reference.

Definition at line 6466 of file libedt.c.

const char * edt_get_fpga_mfg ( EdtDev * edt_p )

Returns in string form (character array) the FPGA manufacturer.

Parameters:

edt_p

pointer to edt device structure returned by edt_open

Returns:: character array containing the name of the FPGA type; one of Xilinx, Altera, or empty string if unknown.

Definition at line 223 of file edt_flash.c.

int edt_get_max_buffers ( EdtDev * edt_p )

Get the maximum number of ring buffers that can be allocated.

The default maximum number of ring buffers differs depending on the type of EDT device is in use; additionally the maximum can be changed by edt_set_max_buffers.

Parameters:

edt_p

pointer to edt device structure returned by edt_open or edt_open_channel

Returns:: the maximum number of buffers that can be allocated, or -1 on failure

See also:: edt_configure_ring_buffers, edt_set_max_buffers

Definition at line 6663 of file libedt.c.

int edt_get_msg	(	EdtDev *	edt_p,
		char *	msgbuf,
		int	maxsize
	)

Gets a message using the serial port of the current unit & channel.

If the number of bytes read is less than maxsize, msgbuf will be NULL terminated.

Parameters:

	edt_p	pointer to edt device structure returned by edt_open or edt_open_channel
	msgbuf	the buffer to store the message into
	maxsize	the maximum number of bytes to fill in. (Should not be greater than size of msgbuf.

Returns:: Number of bytes in message, 0 indicates error.

Definition at line 4719 of file libedt.c.

Edt_prominfo* edt_get_prominfo ( int promcode )

Returns the pciload device information structure for the specific flash PROM code given.

Parameters:

promcode

the flash PROM code index for the device's EPinfo table entry -- see AMD_ etc. defines in libedt.h, and edt_flash_prom_detect.

Returns:: pointer to Edt_prominfo struct.

Definition at line 211 of file edt_flash.c.

int edt_ioctl	(	EdtDev *	edt_p,
		int	code,
		void *	arg
	)

edt_ioctl

DESCRIPTION initiate an action in Edt_Dev driver, without getting or setting anything

ARGUMENTS: fd file descriptor from DEV_open() routine action action to take -- mustbe XXG_ action, defined in edt_ioctl.h

Definition at line 4317 of file libedt.c.

u_int edt_lcr_read	(	EdtDev *	edt_p,
		unsigned int	regBlock,
		unsigned int	regOffset
	)

A convenience routine to access the EDT LCR registers.

Passed the Block and offset for a 32-bit word.

Parameters:

	edt_p	pointer to edt device structure returned by edt_open or edt_open_channel
	block	integer register block selector
	offset	integer block offset

Returns:: The value of the 32-bit register.

Example u_int regVal = edt_lcr_read(edt_p, 2, 1);

See also:: edt_lcr_write, edt_reg_read.

Definition at line 9469 of file libedt.c.

void edt_lcr_write	(	EdtDev *	edt_p,
		unsigned int	regBlock,
		unsigned int	regOffset,
		unsigned int	regVal
	)

A convenience routine to access the EDT LCR registers.

Passed the Block and offset for a 32-bit word.

Parameters:

	edt_p	pointer to edt device structure returned by edt_open or edt_open_channel
	block	integer register block selector
	offset	integer block offset
	data	32-bit value to set register with.

Example

 u_int regVal = 0xb01d_bee;
 edt_lcr_write(edt_p, 2, 1, regVal);

See also:: edt_demod_read, edt_reg_write.

Definition at line 9500 of file libedt.c.

int edt_pci_reboot ( EdtDev * edt_p )

reboot the PCI xilinx

RETURNS: 0 on success, -1 on failure

Definition at line 8179 of file libedt.c.

int edt_program_flash	(	EdtDev *	edt_p,
		const u_char *	buf,
		int	size,
		int	do_sleep
	)

Program the interface fpga flash PROM.

Typically only called by edt_bitload.

Parameters:

	edt_p	pointer to edt device structure returned by edt_open
	buf	buffer containing the data to be loaded
	size	number of bytes to load from buffer add sleeps to slow it down in case of host speed issues

Returns:: 0 on success, nonzero on failure

Definition at line 1696 of file edt_bitload.c.

void edt_read_prom_data	(	EdtDev *	edt_p,
		int	promcode,
		int	segment,
		EdtPromData *	pdata
	)

Get the onboard PROM device info, as written to unused PROM space by EDT before shipping, or thereafter via -I or -i options to pciload.

Caller should pass in a pointter to an EdtPromData struct (defined in libedt.h); this subroutine reads the info out from the specified segment and fill in the fields in the struct.

Parameters:

	edt_p	pointer to edt device structure returned by edt_open
	promcode	prom device code for this device, as returned by edt_flash_prom_detect.
	segment	which segment to read the info from; for the default, call edt_get_prominfo, and use the defaultseg element from the Edt_prominfo struct it returns
	pdata	pointer to EdtPromData struct, into which the info will be read

Returns:: void

Definition at line 2568 of file edt_flash.c.

int edt_set_max_buffers	(	EdtDev *	edt_p,
		int	newmax
	)

Change the maximum number of ring buffers that can be allocated.

The default number of buffers differs depending on the EDT device being accessed, and is set to a conservative limit meant to ensure that too many system resources are not consumed. However, application and system architecture may indicate more buffers so this call is provided to up the number. The absolute maximum is 1024.

Parameters:

	edt_p	pointer to edt device structure returned by edt_open or edt_open_channel
	newmax	new maximum, up to 1024

Returns:: 0 on success, -1 on failure

See also:: edt_configure_ring_buffers, edt_get_max_buffers

Definition at line 6640 of file libedt.c.

int edt_set_sync_interval	(	EdtDev *	edt_p,
		u_int	interval
	)

For large buffers on systems with bounce buffers (i.e.

solaris x86_64) set the size of DMA which will cause an interrupt to call the sync function, rather than waiting until the end. For example a 40 MB buffer with interval 4 MB will call sync 10 times as DMA is happening.

Definition at line 9254 of file libedt.c.

void edt_set_trace_regs	(	EdtDev *	edt_p,
		u_int	reg_def,
		u_int	state
	)

Enable or disable tracing a single reg access.

If reg_def ends in ffff, trace all register accesses of that type.

Definition at line 9185 of file libedt.c.

int edtdev_channels_from_type ( EdtDev * edt_p )

edtdev_channels_from_type

Parameters:

edt_p

pointer to device structure

Returns:: the number of channels for a board's devid (PCI minor number).

Definition at line 7338 of file libedt.c.

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