| 
    EDT PCD SDK Documentation 6.2.1
    
   | 
 
#include "edtinc.h"Data Structures | |
| struct | EdtOCXFrameErrors | 
| Structure used by edt_ocx_get_framing_errors() for returning various framing errors from the framer registers.  More... | |
| struct | edt_oc_config | 
| Structure used to pass configuration parameters to OCX routines.  More... | |
Macros | |
| #define | EDT_OCX_BYTE_SWAP 0x1 | 
| #define | EDT_OCX_SHORT_SWAP 0x2 | 
| #define | EDT_OCX_LSB_FIRST 0x4 | 
| #define | EDT_OCX_SWAP (EDT_OCX_BYTE_SWAP | EDT_OCX_SHORT_SWAP) | 
| #define | EDT_OCX_ORDER_MASK 0x7 | 
| #define | EDT_OCX_FRAMED 0x8 | 
| #define | EDT_OCX_DESCRAMBLE 0x10 | 
| #define | EDT_OCX_ENABLE_MEM 0x20 | 
| #define | EDT_OCX_OVHD_ONLY 0x40 | 
| #define | EDT_OCX_PRBS_EN 0x200 | 
| #define | EDT_OCX_SKIP_LOAD 0x400 | 
| #define | EDT_OCX_FULL_INIT 0x800 | 
| #define | EDT_OCX_LOOPBACK 0x2000 | 
| #define | EDT_OCX_REMOTE_LPBK 0x10000 | 
| #define | EDT_OCX_SCRAMBLE 0x1000 | 
| #define | EDT_OCX_INVERT 0x4000 | 
| #define | EDT_OCX_SET_DEMUX 0x8000 | 
| #define | EDT_OCX_TAGGED_DATA 0x80000 | 
| #define | EDT_OCX_ENABLE_COUNT_DATA 0x100000 | 
| #define | EDT_OCX_FREERUN_COUNT_DATA 0x200000 | 
| #define | EDT_OCX_ETHERNET_ALL_DECODE 0x400000 | 
| #define | EDT_OCX_FRAMED_BYTES 0x40000000 | 
Typedefs | |
| typedef enum EdtLineRate | EdtLineRate | 
| typedef struct EdtOCXFrameErrors | EdtOCXFrameErrors | 
| Structure used by edt_ocx_get_framing_errors() for returning various framing errors from the framer registers.  | |
| typedef struct edt_oc_config | EdtOCConfig | 
| Structure used to pass configuration parameters to OCX routines.  | |
Enumerations | |
| enum | EdtLineRate | 
Functions | |
| int | edt_reg_set_bitmask (EdtDev edt_p, uint32_t reg, uint32_t mask, int state) | 
Set or clear mask bits in register reg .  More... | |
| int | edt_wait_register_bits_low (EdtDev edt_p, uint32_t reg, uint32_t mask, int timeout) | 
Wait until the mask bits in reg have cleared to zero.  More... | |
| int | edt_wait_register_bits_low_timer (EdtDev edt_p, uint32_t reg, uint32_t mask, int timeout) | 
Wait until the mask bits in reg have cleared to zero.  More... | |
| int | edt_wait_register_bits_high (EdtDev edt_p, uint32_t reg, uint32_t mask, int timeout) | 
Wait until the mask bits in reg have set to one.  More... | |
| int | edt_wait_register_bits_high_timer (EdtDev edt_p, uint32_t reg, uint32_t mask, int timeout) | 
Wait until the mask bits in reg have set to one.  More... | |
| #define EDT_OCX_BYTE_SWAP 0x1 | 
Swap data at 8-bit boundaries.
| #define EDT_OCX_SHORT_SWAP 0x2 | 
Swap data at 16-bit boundaries.
| #define EDT_OCX_LSB_FIRST 0x4 | 
When set, the least significant bit of the 32-bit data word is the first bit, and the most significant bit is the last. When clear, the most significant bit of a 32-bit word is the first bit.
| #define EDT_OCX_SWAP (EDT_OCX_BYTE_SWAP | EDT_OCX_SHORT_SWAP) | 
Both EDT_OCX_BYTE_SWAP and EDT_OCX_SHORT_SWAP give network order on x86 architecture.
| #define EDT_OCX_ORDER_MASK 0x7 | 
Mask for lower three "order" bits.
| #define EDT_OCX_FRAMED 0x8 | 
Turn on framing.
| #define EDT_OCX_DESCRAMBLE 0x10 | 
Turn on descrambler.
| #define EDT_OCX_ENABLE_MEM 0x20 | 
Turn on mezzanine memory.
| #define EDT_OCX_OVHD_ONLY 0x40 | 
Filter out overhead only.
| #define EDT_OCX_PRBS_EN 0x200 | 
Turn on PRBS pattern generator in LIU.
| #define EDT_OCX_SKIP_LOAD 0x400 | 
Disable loading correct bitfile; fail instead.
| #define EDT_OCX_FULL_INIT 0x800 | 
Initialize baseboard as well as mezzanine.
| #define EDT_OCX_LOOPBACK 0x2000 | 
Enable loop back through LIU.
| #define EDT_OCX_REMOTE_LPBK 0x10000 | 
Enable remote loopback from LIU.
| #define EDT_OCX_SCRAMBLE 0x1000 | 
Enable TX scrambler.
| #define EDT_OCX_INVERT 0x4000 | 
Invert data when checking.
| #define EDT_OCX_SET_DEMUX 0x8000 | 
Set the demux array.
| #define EDT_OCX_TAGGED_DATA 0x80000 | 
Turn on OC192 data tagging.
| #define EDT_OCX_ENABLE_COUNT_DATA 0x100000 | 
Enable a 32 bit counter data instead of input data, for debug.
| #define EDT_OCX_FREERUN_COUNT_DATA 0x200000 | 
Enable the 32 bit counter to free run to get latency and bandwidth info.
| #define EDT_OCX_ETHERNET_ALL_DECODE 0x400000 | 
Enable the Ethernet FCS layer to output all bytes.
| #define EDT_OCX_FRAMED_BYTES 0x40000000 | 
Align on frames but capture on byte alignment.
| typedef enum EdtLineRate EdtLineRate | 
Optical Ethernet line rate constants.
| enum EdtLineRate | 
Optical Ethernet line rate constants.
| int edt_reg_set_bitmask | ( | EdtDev | edt_p, | 
| uint32_t | reg, | ||
| uint32_t | mask, | ||
| int | state | ||
| ) | 
Set or clear mask bits in register reg . 
| edt_p | The open EDT device handle. | 
| reg | Descriptor of register to modify. | 
| mask | If a bit is set to one in this mask, that bit will be modified. Bits set to zero will not be modified. | 
| state | Enable (1) to set (OR with mask) mask bits in the register. Disable (0) to clear (AND with ~mask) the mask bits in the register. | 
| int edt_wait_register_bits_low | ( | EdtDev | edt_p, | 
| uint32_t | reg, | ||
| uint32_t | mask, | ||
| int | timeout | ||
| ) | 
Wait until the mask bits in reg have cleared to zero. 
| edt_p | The open EDT device handle. | 
| reg | Descriptor of register to read with edt_reg_read(). | 
| mask | Bits set to one in this mask will be checked. | 
| timeout | Timeout, in millseconds, to wait for all bits to clear to zero. Pass zero to wait indefinitely. | 
timeout ms. Non-zero if timeout occurred. | int edt_wait_register_bits_low_timer | ( | EdtDev | edt_p, | 
| uint32_t | reg, | ||
| uint32_t | mask, | ||
| int | timeout | ||
| ) | 
Wait until the mask bits in reg have cleared to zero. 
| edt_p | The open EDT device handle. | 
| reg | Descriptor of register to read with edt_reg_read(). | 
| mask | Bits set to one in this mask will be checked. | 
| timeout | Timeout, in millseconds, to wait for all bits to clear to zero. Pass zero to wait indefinitely. | 
| int edt_wait_register_bits_high | ( | EdtDev | edt_p, | 
| uint32_t | reg, | ||
| uint32_t | mask, | ||
| int | timeout | ||
| ) | 
Wait until the mask bits in reg have set to one. 
| edt_p | The open EDT device handle. | 
| reg | Descriptor of register to read with edt_reg_read(). | 
| mask | Bits set to one in this mask will be checked. | 
| timeout | Timeout, in millseconds, to wait for all bits to set to one. Pass zero to wait indefinitely. | 
timeout ms. Non-zero if timeout occurred. | int edt_wait_register_bits_high_timer | ( | EdtDev | edt_p, | 
| uint32_t | reg, | ||
| uint32_t | mask, | ||
| int | timeout | ||
| ) | 
Wait until the mask bits in reg have set to one. 
| edt_p | The open EDT device handle. | 
| reg | Descriptor of register to read with edt_reg_read(). | 
| mask | Bits set to one in this mask will be checked. | 
| timeout | Timeout, in millseconds, to wait for all bits to set to one. Pass zero to wait indefinitely. |