pdv_irig.h File Reference

(git 517a79a4ea, 2024-08-22)

#include "libpdv.h"
#include "libedt_timing.h"
#include <stdint.h>

Data Structures
struct	irig2_record

Macros
#define	IRIG2_TYPE_UNIX   3
#define	IRIG2_TYPE_RAW   5
#define	IRIG2_MAGIC   0x01544445

Typedefs
typedef struct irig2_record	Irig2Record

Functions
int	pdv_reset_dma_framecount (PdvDev pdv_p)
	Reset the DMA frame counter in the frame grabber FPGA. More...
int	pdv_irig_set_raw (PdvDev pdv_p, int enable_raw)
	Set the IRIG time code format to either "raw" or "Unix". More...
Irig2Record *	pdv_irig_get_footer (PdvDev pdv_p, const uint8_t *imagedata)
	Extract the IRIG time code data from an image footer. More...
double	pdv_irig_process_time (Irig2Record *footer)
	Compute the monotonic Unix time and save it to the irig2_record::timestamp field. More...
void	pdv_irig_reset_errors (PdvDev pdv_p)
	Reset IRIG time code decoding error flags. More...
int	pdv_irig_set_offset (PdvDev pdv_p, int offset_sec)
	Set a positive time code offset to account for (1 PPS sync'd) acquisition latencies. More...
int	pdv_irig_get_current (PdvDev pdv_p, Irig2Record *footer)
	Read IRIG time code information directly from the FPGA. More...

Detailed Description

Copyright

Copyright (C) 2011 Engineering Design Team, Inc.

Configure or parse the IRIG time code information which may be added by the frame grabber to a frame buffer's "footer" region.

Macro Definition Documentation

IRIG2_TYPE_UNIX

#define IRIG2_TYPE_UNIX   3

IRIG time code data is in the Unix format.

IRIG2_TYPE_RAW

#define IRIG2_TYPE_RAW   5

IRIG time code data is in the "raw" format.

IRIG2_MAGIC

#define IRIG2_MAGIC   0x01544445

Expected value of irig2_record::magic. Value is ASCII: 'E' 'D' 'T' 01

Typedef Documentation

Irig2Record

typedef struct irig2_record Irig2Record

Holds the IRIG info captured at the rising edge of frame valid.

Function Documentation

pdv_reset_dma_framecount()

int pdv_reset_dma_framecount

(

PdvDev

pdv_p

)

Reset the DMA frame counter in the frame grabber FPGA.

The frame count value is written to irig2_record::framecnt by the FPGA.

Parameters

pdv_p

The open EDT device handle.

Returns

0 on success.

pdv_irig_set_raw()

int pdv_irig_set_raw	(	PdvDev	pdv_p,
		int	enable_raw
	)

Set the IRIG time code format to either "raw" or "Unix".

Parameters

pdv_p	The open EDT device handle.
enable_raw	True (1) – Use raw time code format. False (0) – Use Unix time code format.

Returns

0 on success.

See also

edt_set_timecode_raw()

pdv_irig_get_footer()

Irig2Record * pdv_irig_get_footer	(	PdvDev	pdv_p,
		const uint8_t *	imagedata
	)

Extract the IRIG time code data from an image footer.

pdv_get_header_offset() is used to determine the footer location.

Parameters

pdv_p	The open EDT device handle.
imagedata	The image frame buffer to inspect.

Returns

The IRIG time code structure, or NULL on error.

pdv_irig_process_time()

double pdv_irig_process_time

(

Irig2Record *

footer

)

Compute the monotonic Unix time and save it to the irig2_record::timestamp field.

Parameters

[in,out]

footer

Footer structure from an image frame. See pdv_irig_get_footer().

Returns

The computed timestamp value.

pdv_irig_reset_errors()

void pdv_irig_reset_errors

(

PdvDev

pdv_p

)

Reset IRIG time code decoding error flags.

Parameters

pdv_p

The open EDT device handle.

pdv_irig_set_offset()

int pdv_irig_set_offset	(	PdvDev	pdv_p,
		int	offset_sec
	)

Set a positive time code offset to account for (1 PPS sync'd) acquisition latencies.

This is described in more detail by the edt_set_timecode_seconds_offset() function.

Parameters

pdv_p	The open EDT device handle.
offset_sec	Offset, in seconds, to add to the time code.

Returns

0 on success.

pdv_irig_get_current()

int pdv_irig_get_current	(	PdvDev	pdv_p,
		Irig2Record *	footer
	)

Read IRIG time code information directly from the FPGA.

Reads seconds, clocks, tickpps and status data from the frame grabber FPGA and stores them in the corresponding irig2_record struct fields.

Parameters

	pdv_p	The open EDT device handle.
[out]	footer	Time code information read from the FPGA will be returned here.

Returns

0 on success.