EDT PDV SDK Documentation 6.1.0
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#include "libpdv.h"
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void | pdv_cls_dump_state (PdvDev pdv_p) |
Prints the board state to stdout. More... | |
void | pdv_cls_dump_geometry (PdvDev pdv_p) |
Prints board geometry only to stdout. More... | |
int | pdv_cls_set_dep (PdvDev pdv_p) |
Initializes CLS values based on PdvDependent structure in pdv_p . More... | |
int | pdv_cls_dep_sanity_check (PdvDev pdv_p) |
Checks for inconsistencies in the configuration completed by pdv_cls_set_dep(). More... | |
void | pdv_cls_set_size (PdvDev pdv_p, int taps, int depth, int width, int height, int hblank, int totalwidth, int vblank, int totalheight) |
Set the width and height of the simulator frame. More... | |
void | pdv_cls_set_line_timing (PdvDev pdv_p, int width, int taps, int Hfvstart, int Hfvend, int Hlvstart, int Hlvend, int Hrvstart, int Hrvend) |
Set the values for frame valid (FVAL), line valid (LVAL), and read valid (RVAL) timing. More... | |
void | pdv_cls_set_linescan (PdvDev pdv_p, int state) |
When set, once the start-of-frame conditions are met, the simulator runs forever, emulating a linescan camera (as if the total vertical active and total vertical count maximum were set to infinity.) More... | |
void | pdv_cls_set_lvcont (PdvDev pdv_p, int state) |
Enable/Disable line valid timing during vertical blanking. More... | |
void | pdv_cls_set_rven (PdvDev pdv_p, int state) |
Enable/Disable ReadValid Enable (RVEN); if enabled allows image width padding (with dummy data from the Fill register values), to output an image that is wider than the actual image data provided. More... | |
void | pdv_cls_set_uartloop (PdvDev pdv_p, int state) |
Enable/Disable UART looping (echo) of serial data; if enabled allows testing of the serial port on an EDT Framegrabber. More... | |
void | pdv_cls_set_smallok (PdvDev pdv_p, int state) |
Enable/Disable CLS FIFO for small (less than 16 KB) images. More... | |
void | pdv_cls_set_intlven (PdvDev pdv_p, int state) |
Enables or disables four-tap interleaving (the four-tap re-ordering of 8-bit pixel values). More... | |
void | pdv_cls_set_firstfc (PdvDev pdv_p, int state) |
Enable/Disable frame count in the first word of each frame. More... | |
void | pdv_cls_set_datacnt (PdvDev pdv_p, int state) |
Enable/Disable internal image data generation; allows image data to come from the counters instead of the DMA stream. More... | |
void | pdv_cls_set_led (PdvDev pdv_p, int state) |
Controls state of the board's green LED. More... | |
void | pdv_cls_set_trigsrc (PdvDev pdv_p, int select) |
Selects which input pins to look at for external trigger; CC1 or CC2. More... | |
void | pdv_cls_set_trigpol (PdvDev pdv_p, int polarity) |
Set the trigger polarity. More... | |
void | pdv_cls_set_trigframe (PdvDev pdv_p, int state) |
Enable/Disable frame-valid triggering; if enabled CLS waits at the start of each frame until a trigger is detected. More... | |
void | pdv_cls_set_trigline (PdvDev pdv_p, int state) |
Enable/Disable line-valid triggering; if enabled CLS waits at the start of each raster until a trigger is detected. More... | |
void | pdv_cls_sim_start (PdvDev pdv_p) |
Clear the CFG register including the FIFO_RESET bit (bit 3, 0x08) which clears the FIFO and starts the CLS. More... | |
void | pdv_cls_sim_stop (PdvDev pdv_p) |
Set the CFG register FIFO_RESET bit (bit 3, 0x08) which stops the CLS. More... | |
void | pdv_cls_init_serial (PdvDev pdv_p) |
Re-intializes and enables the serial communication. More... | |
void | pdv_cls_set_height (PdvDev pdv_p, int height, int vblank) |
Set the height of outgoing frames, as well as the number of blank lines (vblank ) between valid lines. More... | |
void | pdv_cls_set_width (PdvDev pdv_p, int width, int hblank) |
Set the width of outgoing frames, as well as the number of blank columns (hblank ) between valid columns. More... | |
void | pdv_cls_set_width_lval_rval (PdvDev pdv_p, int width, int hblank, int hlvstart, int hlvend, int hrvstart, int hrvend) |
Set the width of outgoing frames, as well as the number of blank columns (hblank ) between valid columns, start and end of both line valid and read valid. More... | |
void | pdv_cls_set_depth (PdvDev pdv_p, int value) |
Set the depth of outgoing frames. More... | |
void | pdv_cls_set_clock (PdvDev pdv_p, double freq) |
Set the pxiel clock frequency (in MHz). More... | |
void | pdv_cls_set_fill (PdvDev pdv_p, u_char left, u_char right) |
Set the left and right fill values when RVEN (pdv_cls_set_rven()) is enabled. More... | |
void | pdv_cls_set_readvalid (PdvDev pdv_p, u_short HrvStart, u_short HrvEnd) |
Set the horizontal start and end positions if RVEN (pdv_cls_set_rven()) is enabled. More... | |
void | pdv_cls_set_dvalid (PdvDev pdv_p, u_char skip, u_char mode) |
Set the values for Data Valid (DVAL) timing. More... | |
void | pdv_cls_setup_interleave (PdvDev pdv_p, short tap0start, short tap0delta, short tap1start, short tap1delta, short tap2start, short tap2delta, short tap3start, short tap3delta) |
Set the start address and delta for each tap. More... | |
int | pdv_cls_get_vgap (PdvDev pdv_p) |
Computes the vertical gap (vgap\vblank) value. More... | |
int | pdv_cls_get_hgap (PdvDev pdv_p) |
Computes the horizontal gap (hgap/hblank) value. More... | |
double | pdv_cls_frame_time (PdvDev pdv_p) |
Computes the frame time in milliseconds. More... | |
Camera Link Simulator Library header file, for use with the EDT CameraLink Simulator (CLS).