EDT Camera Link Simulator Library

Detailed Description

The Camera Link Simulator (CLS) Library provides programming access to the EDT Camera Link Simulator boards, including the PCI DV CLS and PCIe8 DVa CLS.

The source code for the library is in clsim_lib.c and clsim_lib.h.

The following applications are also provided:


Defines

#define PDV_CLS_DEFAULT_HGAP   300
#define PDV_CLS_DEFAULT_HGAP   300
#define PDV_CLS_DEFAULT_VGAP   400
#define PDV_CLS_DEFAULT_VGAP   400

Functions

int pdv_cls_dep_sanity_check (PdvDev *pdv_p)
 Checks for inconsistencies in the configuration (stub).
void pdv_cls_dump_geometry (PdvDev *pdv_p)
 Prints board geometry only to stdout.
void pdv_cls_dump_state (PdvDev *pdv_p)
 Prints the board state to stdout.
double pdv_cls_frame_time (PdvDev *pdv_p)
 Computes and returns the frame time in milliseconds.
int pdv_cls_get_hgap (PdvDev *pdv_p)
 Computes the horizontal gap value based on the difference between active clocks (hblank) and the total clocks.
int pdv_cls_get_vgap (PdvDev *pdv_p)
 Computes the vertical gap value based on the difference between active lines(vblank) and the total lines.
void pdv_cls_init_serial (PdvDev *pdv_p)
 Re-intializes and enables the serial communication.
void pdv_cls_set_clock (EdtDev *edt_p, double freq)
 Set the clock frequency (MHz).
void pdv_cls_set_datacnt (PdvDev *pdv_p, int state)
 Enables / disables internal image data generation.
int pdv_cls_set_dep (PdvDev *pdv_p)
 Initializes simulator values based on PdvDependent structure in pdv_p.
void pdv_cls_set_depth (PdvDev *pdv_p, int value)
void pdv_cls_set_fill (PdvDev *pdv_p, u_char left, u_char right)
 Sets the left and right fill values when READVAL is set.
void pdv_cls_set_firstfc (PdvDev *pdv_p, int state)
 Enables / disables frame count in the first word of each frame.
void pdv_cls_set_height (PdvDev *pdv_p, int rasterlines, int vblank)
 Set the height of outgoing frames, as well as the number of lines (vgap) between lines.
void pdv_cls_set_intlven (PdvDev *pdv_p, int state)
 Enables or disables four-tap interleaving.
void pdv_cls_set_led (PdvDev *pdv_p, int state)
 Controls state of the board's green LED.
void pdv_cls_set_line_timing (PdvDev *pdv_p, int width, int taps, int Hfvstart, int Hfvend, int Hlvstart, int Hlvend, int Hrvstart, int Hrvend)
 Set the values for frame valid (FVAL), line valid (LVAL), and read valid (RVAL) timing.
void pdv_cls_set_linescan (PdvDev *pdv_p, int state)
 When set, once the start-of-frame conditions are met, the simulator runs forever, emulating a linescan camera (as if the total vertical active and total vertical count maximum were set to infinity.
void pdv_cls_set_lvcont (PdvDev *pdv_p, int state)
 Enables / disables line valid timing during vertical blanking.
void pdv_cls_set_readvalid (PdvDev *pdv_p, u_short HrvStart, u_short HrvEnd)
 Sets the horizontal start and end positions of the ReadValid signal.
void pdv_cls_set_rven (PdvDev *pdv_p, int state)
 Enables or disables ReadValid Enable (RVEN).
void pdv_cls_set_size (PdvDev *pdv_p, int taps, int depth, int width, int height, int hblank, int totalwidth, int vblank, int totalheight)
 Set the width and height of the simulator frame.
void pdv_cls_set_smallok (PdvDev *pdv_p, int state)
 Sets simulator FIFO for small (less than 16KB) images.
void pdv_cls_set_trigframe (PdvDev *pdv_p, int state)
 Set to enable frame-valid triggering.
void pdv_cls_set_trigline (PdvDev *pdv_p, int state)
 Set to enable line-valid triggering.
void pdv_cls_set_trigpol (PdvDev *pdv_p, int state)
 Sets the trigger polariry.
void pdv_cls_set_trigsrc (PdvDev *pdv_p, int state)
 Selects which input pins to look at for external trigger.
void pdv_cls_set_uartloop (PdvDev *pdv_p, int state)
 Enables or disables UART looping (echo) of serial data.
void pdv_cls_set_width (PdvDev *pdv_p, int width, int hblank)
 Set the width of outgoing lines, as well as the number of clocks (hgap) between lines.
void pdv_cls_set_width_lval_rval (PdvDev *pdv_p, int width, int hblank, int hlvstart, int hlvend, int hrvstart, int hrvend)
 Set the width of outgoing lines, as well as the number of clocks (hgap) between lines and start and end of line valid and read valid.
void pdv_cls_setup_interleave (PdvDev *pdv_p, short tap0start, short tap0delta, short tap1start, short tap1delta, short tap2start, short tap2delta, short tap3start, short tap3delta)
 Sets the start address and delta for each tap.
void pdv_cls_sim_start (PdvDev *pdv_p)
 Clears the CFG register including the FIFO_RESET bit (bit 3, 0x08) which clears the fifo and starts the simulator.
void pdv_cls_sim_stop (PdvDev *pdv_p)
 Sets the CFG register FIFO_RESET bit (bit 3, 0x08) which stops the simulator.

Function Documentation

int pdv_cls_dep_sanity_check ( PdvDev *  pdv_p  ) 

Checks for inconsistencies in the configuration (stub).

Currently this is a stub. In the future it will return a nonzero error code if a problem is found.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
Returns:
0 if ok, otherwise error code
See also:
pdv_cls_set_dep

Definition at line 1081 of file clsim_lib.c.

void pdv_cls_dump_geometry ( PdvDev *  pdv_p  ) 

Prints board geometry only to stdout.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
Returns:
void

Definition at line 1223 of file clsim_lib.c.

void pdv_cls_dump_state ( PdvDev *  pdv_p  ) 

Prints the board state to stdout.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
Returns:
void

Definition at line 1121 of file clsim_lib.c.

double pdv_cls_frame_time ( PdvDev *  pdv_p  ) 

Computes and returns the frame time in milliseconds.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
Returns:
the computed frame time

Definition at line 1094 of file clsim_lib.c.

int pdv_cls_get_hgap ( PdvDev *  pdv_p  ) 

Computes the horizontal gap value based on the difference between active clocks (hblank) and the total clocks.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
Returns:
horizontal gap value

Definition at line 147 of file clsim_lib.c.

int pdv_cls_get_vgap ( PdvDev *  pdv_p  ) 

Computes the vertical gap value based on the difference between active lines(vblank) and the total lines.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
Returns:
vertical gap value

Definition at line 179 of file clsim_lib.c.

void pdv_cls_init_serial ( PdvDev *  pdv_p  ) 

Re-intializes and enables the serial communication.

Rarely used since the serial gets initialized at device open.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
Returns:
void

Definition at line 202 of file clsim_lib.c.

void pdv_cls_set_clock ( PdvDev *  pdv_p,
double  freq 
)

Set the clock frequency (MHz).

On PCI boards, this sets the MPC9230 PLL on PCI CD-CLSIM to 3.5 times the requested pixclk freq. On PCIe DVa boards, sets the SI570 PLL to 1.25x the requeted freq. On PCIe DV boards, sets the SI570 PLL to 1x the requested freq. Valid range is 19.9-85.1. A warning is produced for frequencies outside this range

Parameters:
freq pixel clock frequency (MHz)
Returns:
void

Definition at line 707 of file clsim_lib.c.

void pdv_cls_set_datacnt ( PdvDev *  pdv_p,
int  state 
)

Enables / disables internal image data generation.

When enabled, image data comes from the counters instead of the DMA stream.

The simulated 32-bit data generated has a 16-bit count in the LSbs; the 16 MSbs are an inverted version of the LSBs. The count is cleared to zero at the start of each frame. Thus the first 32-bit word of each frame is 0xffff0000, the second is fffe0001, and so on. The CLS treats this data as little-endian, so the foruth 8-bit pixel fo the frame has a value of 0x01. When set, also setting SMALLOK (pdv_cls_set_smallok) stops the simulator at the start of the next frame, to enable getting a single frame of counter data.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
state 1 outputs internally-generated data. When disabled, outputs data from the host via DMA.
See also:
pdv_cls_set_smallok
Returns:
void

Definition at line 400 of file clsim_lib.c.

int pdv_cls_set_dep ( PdvDev *  pdv_p  ) 

Initializes simulator values based on PdvDependent structure in pdv_p.

The structure is normally filled in by clsiminit. Assumes bitfile already loaded.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open

Definition at line 944 of file clsim_lib.c.

void pdv_cls_set_fill ( PdvDev *  pdv_p,
u_char  left,
u_char  right 
)

Sets the left and right fill values when READVAL is set.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
left the 8 bit left fill value (FillA in CLSIM docs)
right the 8 bit right fill value (FillB in CLSIM docs)
See also:
pdv_cls_set_rven
Returns:
void

Definition at line 875 of file clsim_lib.c.

void pdv_cls_set_firstfc ( PdvDev *  pdv_p,
int  state 
)

Enables / disables frame count in the first word of each frame.

When set, the first word of the frame is the frame count: a 16-bit flag of 0x3333 in the MSbs and a 16-bit framecount in the LSbs. It replaces the first 32-bit word of DMA or internally generated data, after any interleaving. When clear, the forst word is the DMA data or generated data per pdv_cls_set_firstfc.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
state 1 enables the first word frame count, 0 disables it.
Returns:
void

Definition at line 374 of file clsim_lib.c.

void pdv_cls_set_height ( PdvDev *  pdv_p,
int  height,
int  vblank 
)

Set the height of outgoing frames, as well as the number of lines (vgap) between lines.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
height number of pixels per line
vgap number of clocks between lines (vertical gap)
Returns:
void

Definition at line 644 of file clsim_lib.c.

void pdv_cls_set_intlven ( PdvDev *  pdv_p,
int  state 
)

Enables or disables four-tap interleaving.

When set, enables four-tap interleaving -- the four-tap reordering of 8-bit pixel values.

See the CLS Users Guide, Appendix A for a complete description of how data is interleaved. For example, 0x60-61 Tap 0 Start through 0xE-6F Tap 3 Delta. Image data destined for the framegrabber is first passed through an interleaving mechanism to duplicate the data ordering that some cameras exhibit. WHen interleaving is enabled, rasters are restricted to a maximum of 4096 eight-bit pixels of active image data (DMA plus fill).

When clear (default), interleaving is disabled.

To use interleave, first set up the interleave scheme using pdv_cls_setup_interleave.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
enable true to turn on interleave, false to disable it.
See also:
pdv_cls_setup_interleave
Returns:
void

Definition at line 354 of file clsim_lib.c.

void pdv_cls_set_led ( PdvDev *  pdv_p,
int  state 
)

Controls state of the board's green LED.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
power_state true (non-zero) to turn on LED, false to turn it off.
Returns:
void

Definition at line 412 of file clsim_lib.c.

void pdv_cls_set_line_timing ( PdvDev *  pdv_p,
int  width,
int  taps,
int  Hfvstart,
int  Hfvend,
int  Hlvstart,
int  Hlvend,
int  Hrvstart,
int  Hrvend 
)

Set the values for frame valid (FVAL), line valid (LVAL), and read valid (RVAL) timing.

In each case, if the end value is 0, the number of clocks required for width is added to the start value (default 0). So if start and end are 0, defaults are start = 0 and end = width/taps.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
taps number of clocks per line
width active pixels per line
Hfvstart 
Hfvend 
Hlvstart 
Hlvend 
Hrvstart 
Hrvend 
Returns:
void

Definition at line 97 of file clsim_lib.c.

void pdv_cls_set_linescan ( PdvDev *  pdv_p,
int  state 
)

When set, once the start-of-frame conditions are met, the simulator runs forever, emulating a linescan camera (as if the total vertical active and total vertical count maximum were set to infinity.

)

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
state 1 enables linescan, 0 disables linescan
Returns:
void

Definition at line 248 of file clsim_lib.c.

void pdv_cls_set_lvcont ( PdvDev *  pdv_p,
int  state 
)

Enables / disables line valid timing during vertical blanking.

When set, line valid is asserted continuously with it's normal timing, even during the vertical blanking interval between frames. When celar, line valid remains low during vertical blanking. Default is unset (0).

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
state 1 enables continuous line valid , 0 disables it
Returns:
void

Definition at line 267 of file clsim_lib.c.

void pdv_cls_set_readvalid ( PdvDev *  pdv_p,
u_short  HrvStart,
u_short  HrvEnd 
)

Sets the horizontal start and end positions of the ReadValid signal.

Note that these values have no effect unless RVEN is true.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
HrvStart start postion
HrvEnd end position
See also:
pdv_cls_set_rven.

Definition at line 889 of file clsim_lib.c.

void pdv_cls_set_rven ( PdvDev *  pdv_p,
int  state 
)

Enables or disables ReadValid Enable (RVEN).

Read valid is special functionality (not in the Camera Link specification) that allows for outputting an image that's wider than the image data provided. The data outside the image data margins is filled with dummy data values.

When RVEN is set, then the start and end margins of each raster are filled with the values from the FillA and FillB registers respectively, the positions of the margins are determined by HrvStart and HrvEnd. When RVEN is cleared, the entire raster is filled with valid data. HrvStart and HrvEnd can be set with pdv_cls_set_readvalid().

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
enable true to enable ReadValid so data in margins comes from Fill values.
Returns:
void

Definition at line 290 of file clsim_lib.c.

void pdv_cls_set_size ( PdvDev *  pdv_p,
int  taps,
int  depth,
int  width,
int  height,
int  hblank,
int  totalwidth,
int  vblank,
int  totalheight 
)

Set the width and height of the simulator frame.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
taps number of clocks per line
depth in bits of data
width width of active data
height number of lines of active data
hblank horizontal blanking between lines
totalwidth total width including horizontal blanking if hblank is zero
vblank horizontal blanking between lines
totalwidth total number of lines including vertical blanking if vblank is zero
There are two ways to set the total width and height including blanking: If hblank is non-zero, the total line width is width + hblank otherwise it is the value passed in in totalwidth. Likewise, if vblank is non-zero, the number of lines between frame valids is height + vblank, otherwise it's the value passed in in totalheight

Returns:
void

Definition at line 30 of file clsim_lib.c.

void pdv_cls_set_smallok ( PdvDev *  pdv_p,
int  state 
)

Sets simulator FIFO for small (less than 16KB) images.

When set, simulator starts DMA when 1KB of data is in the FIFO, allowuing the simulator to handle images smaller than 16 KB. When clear, simulator waits until 16 KB of data is in the FIFO before starting DMA. Default for this state is 0 (clear).

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
state 1 enables the state, 0 disables it
Returns:
void

Definition at line 327 of file clsim_lib.c.

void pdv_cls_set_trigframe ( PdvDev *  pdv_p,
int  state 
)

Set to enable frame-valid triggering.

Simulator waits at the start of each frame until a trigger is detected.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
state 1 enables, 0 disables
See also:
pdv_cls_set_trigsrc, pdv_cls_set_trigpol, pdv_cls_set_trigline
Returns:
void

Definition at line 465 of file clsim_lib.c.

void pdv_cls_set_trigline ( PdvDev *  pdv_p,
int  state 
)

Set to enable line-valid triggering.

Simulator waits at the start of each raster until a trigger is detected. A Dalsa linescan camera starts the next raster when it detects a rising edge on the CC1 line.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
state 1 enables, 0 disables
See also:
pdv_cls_set_trigsrc, pdv_cls_set_trigpol, pdv_cls_set_trigframe
Returns:
void

Definition at line 483 of file clsim_lib.c.

void pdv_cls_set_trigpol ( PdvDev *  pdv_p,
int  polarity 
)

Sets the trigger polariry.

A value of 1 sets the trigger polarity to positive TRUE (the default). A value of 0 sets it to negative TRUE.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
state trigger polarity
See also:
pdv_cls_set_trigsrc, pdv_cls_set_trigframe, pdv_cls_set_trigline
Returns:
void

Definition at line 448 of file clsim_lib.c.

void pdv_cls_set_trigsrc ( PdvDev *  pdv_p,
int  select 
)

Selects which input pins to look at for external trigger.

When set, selects camera control line 2 as trigger source. When clear, selects camera control line 1.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
select 1 enables input trigger on CC2, when clear uses CC1
See also:
pdv_cls_set_trigpol, pdv_cls_set_trigframe, pdv_cls_set_trigline
Returns:
void

Definition at line 430 of file clsim_lib.c.

void pdv_cls_set_uartloop ( PdvDev *  pdv_p,
int  state 
)

Enables or disables UART looping (echo) of serial data.

When set, serial data emitted by the framegrabber is echoed back unchanged, allowing testing of the framegrabber's serial port.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
state 1 enables uart looping, 0 disables it.
Returns:
void

Definition at line 308 of file clsim_lib.c.

void pdv_cls_set_width ( PdvDev *  pdv_p,
int  width,
int  hblank 
)

Set the width of outgoing lines, as well as the number of clocks (hgap) between lines.

Make sure depth / taps are set correctly first by calling pdv_set_depth (or use pdv_cls_set_size instead of this routine), otherwise the registers won't be set correctly. Also note that this overwrites the horizontal line valid start values with new values based on the width & blanking, and sets readvalid to the full width. Follow this with a call to /ref pdv_cls_set_line_timing if you want to set specific values for those.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
width number of pixels per line
hgap number of clocks between lines (horizontal gap)
See also:
pdv_cls_set_height, pdv_cls_set_line_timing
Returns:
void

Definition at line 533 of file clsim_lib.c.

void pdv_cls_set_width_lval_rval ( PdvDev *  pdv_p,
int  width,
int  hblank,
int  hlvstart,
int  hlvend,
int  hrvstart,
int  hrvend 
)

Set the width of outgoing lines, as well as the number of clocks (hgap) between lines and start and end of line valid and read valid.

Same as pdv_cls_set_width but includes lval and readval start and end. Make sure depth / taps are set correctly first by calling pdv_set_depth (or use pdv_cls_set_size instead of this routine), otherwise the registers won't be set correctly.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
width number of pixels per line
hgap number of clocks between lines (horizontal gap)
hlvstart number of clocks between lines (horizontal gap)
hlvend number of clocks between lines (horizontal gap)
See also:
pdv_cls_set_width
Returns:
void

Definition at line 592 of file clsim_lib.c.

void pdv_cls_setup_interleave ( PdvDev *  pdv_p,
short  tap0start,
short  tap0delta,
short  tap1start,
short  tap1delta,
short  tap2start,
short  tap2delta,
short  tap3start,
short  tap3delta 
)

Sets the start address and delta for each tap.

The start address is the 12-bit address of an 8-bit pixel within the 4096 pixel raster. The delta is the amount added to the pixel address with each pixel clock.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
tap0start the start address for tap 0
tap0delta the delta for tap 0
tap1start the start address for tap 1
tap1delta the delta for tap 1
tap2start the start address for tap 2
tap2delta the delta for tap 2
tap3start the start address for tap 3
tap3delta the delta for tap 3
Returns:
void

Definition at line 915 of file clsim_lib.c.

void pdv_cls_sim_start ( PdvDev *  pdv_p  ) 

Clears the CFG register including the FIFO_RESET bit (bit 3, 0x08) which clears the fifo and starts the simulator.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
Returns:
void

Definition at line 498 of file clsim_lib.c.

void pdv_cls_sim_stop ( PdvDev *  pdv_p  ) 

Sets the CFG register FIFO_RESET bit (bit 3, 0x08) which stops the simulator.

Parameters:
pdv_p pointer to pdv device structure returned by pdv_open
Returns:
void

Definition at line 512 of file clsim_lib.c.

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