by Jash Tracey | Apr 17, 2014
The SSE is a mezzanine board that pairs with an EDT main board (for PCI or PCI Express) for high-speed data transfer. It supports three channels (two input and one output) of ECL. The SSE mezzanine samples the data on the rising edge of the clock and stores it in host...
by Jash Tracey | May 17, 2013
Features Sixteen E1 / T1 line interfaces Four E3 / T3 line interfaces Sixteen LVDS (TIA644 standard) or RS422 differential inputs / output (input or output in groups of four) Large Xilinx FPGA (provided by EDT PCIe8 LX, PCI GS, or PCI SS main board – see details...
