Mezzanine boards - electrical

PMC mezzanine boards for electrical interfaces

Combo 3

Combo 3 Mezzanine

E3/T3, ECL, or LVDS/RS422 interface
The Combo 3 is a mezzanine board that pairs with an EDT main board (for PCI or PCI Express) to support multiple standards. It supports E3/T3, ECL, LVDS, or RS422 signals and processes communications serial data for complex, user-defined applications. For details on system requirements and EDT-provided software driver packages, see specifications for your EDT... Read more »


ECL Mezzanine

ECL / LVDS-E / RS422-E Mezzanine

ECL, LVDS-E, or RS422-E interface with E1/T1 option
The ECL / LVDS-E / RS422-E is a mezzanine board that pairs with an EDT main board (for PCI or PCI Express) for high-speed data transfer. This “E-series” board can be ordered ECL, LVDS or RS-422 inputs/outputs in groups of four, with an E1/T1 option. Each channel of the ECL / LVDS-E / RS422-E board... Read more »


LVDS / RS422 Mezzanine

LVDS / RS422 Mezzanine

LVDS or RS422 interface
Features 33 LVDS / RS422 input/output signals Transfer rates up to 90 megabits per second using a single channel; 64 megabits per second using all 16 channels Provides 16 high-speed DMA channels between LVDS or RS422 devices and a PCI computer Fast transfers using a 66 MHz 32-bit PCI Configuration file for 16 synchronous serial... Read more »


SSE Mezzanine

SSE Mezzanine

Synchronous serial ECL interface
The SSE is a mezzanine board that pairs with an EDT main board (for PCI or PCI Express) for high-speed data transfer. It supports three channels (two input and one output) of ECL. The SSE mezzanine samples the data on the rising edge of the clock and stores it in host memory via the main... Read more »


Combo 2 Mezzanine

Combo 2 Mezzanine

E1/T1, E3/T3, LVDS or RS422 interface
Features Sixteen E1 / T1 line interfaces Four E3 / T3 line interfaces Sixteen LVDS (TIA644 standard) or RS422 differential inputs / output (input or output in groups of four) Large Xilinx FPGA (provided by EDT PCIe8 LX, PCI GS, or PCI SS main board – see details below) Two large synchronous static memory banks or one... Read more »


Combo Mezzanine

Combo Mezzanine

E1/T1, E3/T3, ECL interface
Features Sixteen E1 / T1 line interfaces Four E3 / T3 line interfaces Sixteen ECL differential inputs / outputs Large Xilinx FPGA (provided by EDT PCIe8 LX, PCI GS, or PCI SS main board – see details below) Two large synchronous static memory banks or one memory bank up to 1 GB (also provided by main board –... Read more »